JPS5694596A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS5694596A
JPS5694596A JP17318979A JP17318979A JPS5694596A JP S5694596 A JPS5694596 A JP S5694596A JP 17318979 A JP17318979 A JP 17318979A JP 17318979 A JP17318979 A JP 17318979A JP S5694596 A JPS5694596 A JP S5694596A
Authority
JP
Japan
Prior art keywords
output
data
sec
ded
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17318979A
Other languages
English (en)
Inventor
Shuji Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17318979A priority Critical patent/JPS5694596A/ja
Publication of JPS5694596A publication Critical patent/JPS5694596A/ja
Pending legal-status Critical Current

Links

JP17318979A 1979-12-28 1979-12-28 Memory control system Pending JPS5694596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17318979A JPS5694596A (en) 1979-12-28 1979-12-28 Memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17318979A JPS5694596A (en) 1979-12-28 1979-12-28 Memory control system

Publications (1)

Publication Number Publication Date
JPS5694596A true JPS5694596A (en) 1981-07-31

Family

ID=15955736

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17318979A Pending JPS5694596A (en) 1979-12-28 1979-12-28 Memory control system

Country Status (1)

Country Link
JP (1) JPS5694596A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129663A (ja) * 1982-01-29 1983-08-02 Nec Corp エラ−検出回路
JPH05204772A (ja) * 1992-01-23 1993-08-13 Nec Corp 誤り訂正機能付きデジタル回路
JPH06187248A (ja) * 1992-12-16 1994-07-08 Nec Corp データエラー検出訂正制御回路
WO1999003041A1 (fr) * 1997-07-07 1999-01-21 Fanuc Ltd Procede de commande de memoire
US8775899B2 (en) 2011-09-20 2014-07-08 Fujitsu Limited Error correction device, error correction method, and processor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129663A (ja) * 1982-01-29 1983-08-02 Nec Corp エラ−検出回路
JPH05204772A (ja) * 1992-01-23 1993-08-13 Nec Corp 誤り訂正機能付きデジタル回路
JPH06187248A (ja) * 1992-12-16 1994-07-08 Nec Corp データエラー検出訂正制御回路
WO1999003041A1 (fr) * 1997-07-07 1999-01-21 Fanuc Ltd Procede de commande de memoire
US8775899B2 (en) 2011-09-20 2014-07-08 Fujitsu Limited Error correction device, error correction method, and processor

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