JPS5693332A - Glass passivation type semiconductor element - Google Patents

Glass passivation type semiconductor element

Info

Publication number
JPS5693332A
JPS5693332A JP16958279A JP16958279A JPS5693332A JP S5693332 A JPS5693332 A JP S5693332A JP 16958279 A JP16958279 A JP 16958279A JP 16958279 A JP16958279 A JP 16958279A JP S5693332 A JPS5693332 A JP S5693332A
Authority
JP
Japan
Prior art keywords
type
resistance layer
layer
substrate
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16958279A
Other languages
Japanese (ja)
Inventor
Toshio Okubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP16958279A priority Critical patent/JPS5693332A/en
Publication of JPS5693332A publication Critical patent/JPS5693332A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0661Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3178Coating or filling in grooves made in the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To attempt the elevation of reverse characteristic of the glass passivation type semiconductor element by a method wherein a unilaterally conductive type high resistance layer, low resistance layer being formed on one side surface of a substrate, are provided, a ring type projecting part is formed from the low resistance layer to the high resistance layer, a ring type groove is provided from the opposite side face from the substrate reaching to the projecting part and glass is adhered on it. CONSTITUTION:The Si substrate 34 providing with an n type high resistance layer 31, an n<+> type low resistance layer 32, a p<+> type low resistance layer 33, is prepared. The projecting part 331 projecting into the n type layer 31 is provided on the p<+> type layer 33. After the ring type groove 35 is formed from the surface side of the substrate 34 reaching to the projecting part 331, a glass coat 36 is adhered and is processed as usual to complete the element. By this costitution, the face of the groove 35 intersects with the n type layer forming ''positive bevel''. Accordingly the electric field at the surface of the n type layer 31 coming in contact with the glass film 36 is moderated, and the reverse characteristic is elevated.
JP16958279A 1979-12-26 1979-12-26 Glass passivation type semiconductor element Pending JPS5693332A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16958279A JPS5693332A (en) 1979-12-26 1979-12-26 Glass passivation type semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16958279A JPS5693332A (en) 1979-12-26 1979-12-26 Glass passivation type semiconductor element

Publications (1)

Publication Number Publication Date
JPS5693332A true JPS5693332A (en) 1981-07-28

Family

ID=15889142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16958279A Pending JPS5693332A (en) 1979-12-26 1979-12-26 Glass passivation type semiconductor element

Country Status (1)

Country Link
JP (1) JPS5693332A (en)

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