JPS5690545A - Plating method of lead terminal for semiconductor device - Google Patents

Plating method of lead terminal for semiconductor device

Info

Publication number
JPS5690545A
JPS5690545A JP16761979A JP16761979A JPS5690545A JP S5690545 A JPS5690545 A JP S5690545A JP 16761979 A JP16761979 A JP 16761979A JP 16761979 A JP16761979 A JP 16761979A JP S5690545 A JPS5690545 A JP S5690545A
Authority
JP
Japan
Prior art keywords
terminals
lead
semiconductor device
plating
tip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16761979A
Other languages
Japanese (ja)
Other versions
JPS6016751B2 (en
Inventor
Tsutomu Masuko
Masatoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16761979A priority Critical patent/JPS6016751B2/en
Publication of JPS5690545A publication Critical patent/JPS5690545A/en
Publication of JPS6016751B2 publication Critical patent/JPS6016751B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the working efficiency with energization through the elasticity of a lead by inserting an electrode bar diagonally into four sides of a rectangular semiconductor device when an electrolytic plating is applied to the tip of lead terminals insulated from each other provided on the four sides thereof. CONSTITUTION:Lead terminals 2 with each lead fixed by a lead frame 3 are provided on four sides of a rectangular semiconductor device body 1 insulated from each other. A metal plating is applied to terminals of the body 1 thus arranged as follows: A plating electrode bar 4 is inserted into a clearance between the lead terminals 2 adjacent to each other and grasped by the elasticity thereof to energize all the terminals 2. Subsequently, with the tip of the terminals 2 immersed in an electrolytic cell, current flows between the electrode bar 4 and a plating metal such as tin facing it to separate metal such as tin at the tip of the terminals 2.
JP16761979A 1979-12-25 1979-12-25 Lead terminal plating method for semiconductor devices Expired JPS6016751B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16761979A JPS6016751B2 (en) 1979-12-25 1979-12-25 Lead terminal plating method for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16761979A JPS6016751B2 (en) 1979-12-25 1979-12-25 Lead terminal plating method for semiconductor devices

Publications (2)

Publication Number Publication Date
JPS5690545A true JPS5690545A (en) 1981-07-22
JPS6016751B2 JPS6016751B2 (en) 1985-04-27

Family

ID=15853138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16761979A Expired JPS6016751B2 (en) 1979-12-25 1979-12-25 Lead terminal plating method for semiconductor devices

Country Status (1)

Country Link
JP (1) JPS6016751B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03116049U (en) * 1990-03-14 1991-12-02

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03116049U (en) * 1990-03-14 1991-12-02

Also Published As

Publication number Publication date
JPS6016751B2 (en) 1985-04-27

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