JPS5690497A - Memory device - Google Patents
Memory deviceInfo
- Publication number
- JPS5690497A JPS5690497A JP16480379A JP16480379A JPS5690497A JP S5690497 A JPS5690497 A JP S5690497A JP 16480379 A JP16480379 A JP 16480379A JP 16480379 A JP16480379 A JP 16480379A JP S5690497 A JPS5690497 A JP S5690497A
- Authority
- JP
- Japan
- Prior art keywords
- buses
- pair
- address
- data buses
- short
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Digital Computer Display Output (AREA)
- Liquid Crystal Display Device Control (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
PURPOSE: To improve yield by providing respective two data buses and address buses to one memory cell so as to form these in a pair, and short-circuiting between these data buses by means of bridge lines.
CONSTITUTION: Respectively a pair of data buses B, (b) and a pair of addrss buses A, (a) are prepared for one memory cell 10, and bridge lines 4 and 5 for short-circuiting these are provided between a pair of the data buses and a pair of the address buses. Further, pads 6, 7 for testing are formed to the parts connecting the bridge lines 4, 5, and respectively fusible fuses 8, 9 are formed between the pad 6 and the data buses B, (b) and between the pad 7 and the address buses A, (a). Even if disconnection occurs at the point α of the address line A1, it is possible to prevent the cell 10 from getting defective owing to disconnection by the address buses A, (a) and the bridge line 5. Even if a short circuit occurs at the point α of the address line A1, this may be eliminated by fusing the fuse 9.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54164803A JPS6047680B2 (en) | 1979-12-20 | 1979-12-20 | Storage device |
US06/217,093 US4368523A (en) | 1979-12-20 | 1980-12-16 | Liquid crystal display device having redundant pairs of address buses |
EP80107999A EP0031143B1 (en) | 1979-12-20 | 1980-12-17 | Memory device |
DE8080107999T DE3071923D1 (en) | 1979-12-20 | 1980-12-17 | Memory device |
CA000367261A CA1175938A (en) | 1979-12-20 | 1980-12-19 | Memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54164803A JPS6047680B2 (en) | 1979-12-20 | 1979-12-20 | Storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5690497A true JPS5690497A (en) | 1981-07-22 |
JPS6047680B2 JPS6047680B2 (en) | 1985-10-23 |
Family
ID=15800213
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54164803A Expired JPS6047680B2 (en) | 1979-12-20 | 1979-12-20 | Storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6047680B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4823126A (en) * | 1985-04-12 | 1989-04-18 | Matsushita Electric Industrial Co. Ltd. | Display device and a display method |
JP2006214409A (en) * | 2005-02-07 | 2006-08-17 | Dmw Corp | Pump shaft seal device and pump |
-
1979
- 1979-12-20 JP JP54164803A patent/JPS6047680B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4823126A (en) * | 1985-04-12 | 1989-04-18 | Matsushita Electric Industrial Co. Ltd. | Display device and a display method |
JP2006214409A (en) * | 2005-02-07 | 2006-08-17 | Dmw Corp | Pump shaft seal device and pump |
Also Published As
Publication number | Publication date |
---|---|
JPS6047680B2 (en) | 1985-10-23 |
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