JPS5636753A - Testing method for microcomputer - Google Patents

Testing method for microcomputer

Info

Publication number
JPS5636753A
JPS5636753A JP11244179A JP11244179A JPS5636753A JP S5636753 A JPS5636753 A JP S5636753A JP 11244179 A JP11244179 A JP 11244179A JP 11244179 A JP11244179 A JP 11244179A JP S5636753 A JPS5636753 A JP S5636753A
Authority
JP
Japan
Prior art keywords
arithmetic circuit
central arithmetic
bus
socket
microcomputer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11244179A
Other languages
Japanese (ja)
Inventor
Toshinori Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11244179A priority Critical patent/JPS5636753A/en
Publication of JPS5636753A publication Critical patent/JPS5636753A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE: To facilitate a test of a microcomputer by detaching elements of a central arithmetic circuit from an IC socket and by connecting a testing device, equipped with elements with the same functions that the central arithmetic circuit has, to the IC socket.
CONSTITUTION: Testing device 12 is connected to main microcomputer body 11, having the central arithmetic circuit detached from IC socket 10, via the connection line connected to plug 13. Testing device 12 is equipped with central arithmetic circuit 14 that has the same functions that the detached central arithmetic circuit has. With switch group 15 all open, control bus 18 is connected to control bus 31 via control circuit 17, and further to control bus 2 via plug 13. Similarly, address bus 19 is connected to address bus 3, and data bus 22 to data bus 4. Next, switches in switch group 15 are properly operated to check the functions of main body 11.
COPYRIGHT: (C)1981,JPO&Japio
JP11244179A 1979-09-04 1979-09-04 Testing method for microcomputer Pending JPS5636753A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11244179A JPS5636753A (en) 1979-09-04 1979-09-04 Testing method for microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11244179A JPS5636753A (en) 1979-09-04 1979-09-04 Testing method for microcomputer

Publications (1)

Publication Number Publication Date
JPS5636753A true JPS5636753A (en) 1981-04-10

Family

ID=14586699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11244179A Pending JPS5636753A (en) 1979-09-04 1979-09-04 Testing method for microcomputer

Country Status (1)

Country Link
JP (1) JPS5636753A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5899853A (en) * 1981-12-09 1983-06-14 Matsushita Electric Ind Co Ltd Automatic quality deciding device of apparatus using microcomputer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5899853A (en) * 1981-12-09 1983-06-14 Matsushita Electric Ind Co Ltd Automatic quality deciding device of apparatus using microcomputer

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