JPS5687150A - Writer for read only memory - Google Patents

Writer for read only memory

Info

Publication number
JPS5687150A
JPS5687150A JP16502579A JP16502579A JPS5687150A JP S5687150 A JPS5687150 A JP S5687150A JP 16502579 A JP16502579 A JP 16502579A JP 16502579 A JP16502579 A JP 16502579A JP S5687150 A JPS5687150 A JP S5687150A
Authority
JP
Japan
Prior art keywords
bit
data
constitution
write
rom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16502579A
Other languages
Japanese (ja)
Inventor
Toshiyuki Kishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16502579A priority Critical patent/JPS5687150A/en
Publication of JPS5687150A publication Critical patent/JPS5687150A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To write in the output data to an ROM with different bit constitution as the bit constitution of output data, by arbitrarily controlling the memory section and each signal selection section, according to the bit constitution of ROM describing the output data.
CONSTITUTION: The data of hexadecimal code input at the input reception converter 1 is converted into a binary code, the data in 8-bit converted is separated into the upper rank and lower rank 4-bit, the upper rank bit data is transmitted to the multiplexer 2 via the data line D2, and the lower rank bit is stored in the 1st memory device 3 via the data line D1. Further, the multiplexer 2 is controlled with the control signal C1 from the controller 7, and the upper rank bit data is stored in the 2nd memory device 4. The address in this case is determined with the address signal of the address line ADL, the selective instruction of the devices 3, 4 is made with the control signals C3, C4 from the device 7, and the write-in/readout to the devices 3, 4 are made with the control signal C2. Further, the output of the devices 3, 4 is written in the ROM write-in section 6 with the control of the device 7.
COPYRIGHT: (C)1981,JPO&Japio
JP16502579A 1979-12-19 1979-12-19 Writer for read only memory Pending JPS5687150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16502579A JPS5687150A (en) 1979-12-19 1979-12-19 Writer for read only memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16502579A JPS5687150A (en) 1979-12-19 1979-12-19 Writer for read only memory

Publications (1)

Publication Number Publication Date
JPS5687150A true JPS5687150A (en) 1981-07-15

Family

ID=15804406

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16502579A Pending JPS5687150A (en) 1979-12-19 1979-12-19 Writer for read only memory

Country Status (1)

Country Link
JP (1) JPS5687150A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5823392A (en) * 1981-08-03 1983-02-12 Hiroshi Osuji Write system for rom writer
JPS5916186A (en) * 1982-07-20 1984-01-27 Fujitsu Ltd Storage device
JPS5995498U (en) * 1982-12-20 1984-06-28 日本電気株式会社 Storage device
JPS59131044U (en) * 1983-02-23 1984-09-03 三菱重工業株式会社 Sampling tube insertion device
JPS6148195A (en) * 1984-08-13 1986-03-08 Hitachi Ltd One chip microcomputer

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5823392A (en) * 1981-08-03 1983-02-12 Hiroshi Osuji Write system for rom writer
JPS6059673B2 (en) * 1981-08-03 1985-12-26 広 大條 ROM writer writing method
JPS5916186A (en) * 1982-07-20 1984-01-27 Fujitsu Ltd Storage device
JPS635833B2 (en) * 1982-07-20 1988-02-05 Fujitsu Ltd
JPS5995498U (en) * 1982-12-20 1984-06-28 日本電気株式会社 Storage device
JPS59131044U (en) * 1983-02-23 1984-09-03 三菱重工業株式会社 Sampling tube insertion device
JPS6148195A (en) * 1984-08-13 1986-03-08 Hitachi Ltd One chip microcomputer

Similar Documents

Publication Publication Date Title
JPS5580164A (en) Main memory constitution control system
JPS5687150A (en) Writer for read only memory
JPS5723110A (en) Sequence controller
JPS55165072A (en) Video signal processor
JPS57109044A (en) Number converter
JPS55105760A (en) Memory control unit
JPS539433A (en) Buffer memory control system
JPS56156978A (en) Memory control system
JPS5394835A (en) Memory unit
JPS55147717A (en) Input system of optional character of word processor
JPS5458316A (en) Control memory unit
JPS5393735A (en) Memory control system
JPS5727476A (en) Storage device
JPS574670A (en) Picture memory control system
JPS57100535A (en) Data array converter
JPS5752905A (en) Step type memory sequencer
JPS5541511A (en) Micro program control system
JPS55112660A (en) Page address control system
JPS5583527A (en) Working parameter control device for electro-working
JPS5672558A (en) Data transmission system
JPS5773550A (en) Time division data exchange multiplex communcation control system
JPS53121403A (en) Control unit for memory circuit
JPS5680885A (en) Data output control system of memory used for reading
JPS55143634A (en) Connector among electronic computers
JPS5719856A (en) Memory control system