JPS5685829A - Passivation structure for semiconductor device - Google Patents

Passivation structure for semiconductor device

Info

Publication number
JPS5685829A
JPS5685829A JP16255779A JP16255779A JPS5685829A JP S5685829 A JPS5685829 A JP S5685829A JP 16255779 A JP16255779 A JP 16255779A JP 16255779 A JP16255779 A JP 16255779A JP S5685829 A JPS5685829 A JP S5685829A
Authority
JP
Japan
Prior art keywords
film
psg
si3n4
covered
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16255779A
Other languages
Japanese (ja)
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16255779A priority Critical patent/JPS5685829A/en
Publication of JPS5685829A publication Critical patent/JPS5685829A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To improve the hygroscopic problem of a PSG film by covering at least the front and the side surfaces of the PSG film with an Si3N4 film. CONSTITUTION:The PSG containing approx. 20mol% of P is used for the reduction of the surface stepwise unevenness or as a P diffusion source. The PSG film is exposed at connecting holes, scribe grooves and junction pad parts, absorbs water content and accordingly produces phosphoric acid, consequently erodes an aluminum wire, and finally disconnects it. Since the Si3N4 film incorporates high anti-hygroscopic property, when a semiconductor is covered with the Si3N4 film at leasto n the front and the side surfaces thereof thereby preventing direct contact with the atmospheric air, the semiconductor device can be covered with a protective film having high reliability.
JP16255779A 1979-12-14 1979-12-14 Passivation structure for semiconductor device Pending JPS5685829A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16255779A JPS5685829A (en) 1979-12-14 1979-12-14 Passivation structure for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16255779A JPS5685829A (en) 1979-12-14 1979-12-14 Passivation structure for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5685829A true JPS5685829A (en) 1981-07-13

Family

ID=15756844

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16255779A Pending JPS5685829A (en) 1979-12-14 1979-12-14 Passivation structure for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5685829A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154043A (en) * 1983-02-22 1984-09-03 Seiko Epson Corp Semiconductor device
JPS59182544A (en) * 1983-04-01 1984-10-17 Hitachi Micro Comput Eng Ltd Semiconductor integrated circuit device
JPS6258040U (en) * 1985-09-27 1987-04-10
JPS63173332A (en) * 1987-01-12 1988-07-16 Nec Corp Semiconductor integrated circuit device
US5077238A (en) * 1988-05-18 1991-12-31 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device with a planar interlayer insulating film
JPH09139383A (en) * 1995-10-30 1997-05-27 Sony Corp Semiconductor device
US5780364A (en) * 1994-12-12 1998-07-14 Micron Technology, Inc. Method to cure mobile ion contamination in semiconductor processing

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154043A (en) * 1983-02-22 1984-09-03 Seiko Epson Corp Semiconductor device
JPS59182544A (en) * 1983-04-01 1984-10-17 Hitachi Micro Comput Eng Ltd Semiconductor integrated circuit device
JPS6258040U (en) * 1985-09-27 1987-04-10
JPS63173332A (en) * 1987-01-12 1988-07-16 Nec Corp Semiconductor integrated circuit device
US5077238A (en) * 1988-05-18 1991-12-31 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device with a planar interlayer insulating film
US5780364A (en) * 1994-12-12 1998-07-14 Micron Technology, Inc. Method to cure mobile ion contamination in semiconductor processing
US5943602A (en) * 1994-12-12 1999-08-24 Micron Technology, Inc. Method to cure mobile ion contamination in semiconductor processing
US6114222A (en) * 1994-12-12 2000-09-05 Micron Technology, Inc. Method to cure mobile ion contamination in semiconductor processing
JPH09139383A (en) * 1995-10-30 1997-05-27 Sony Corp Semiconductor device

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