JPS5683127A - Analog-digital converter - Google Patents

Abstract

PURPOSE:To achieve A/D conversion for a plurality of analog inputs with almost the same conversion time as convertional systems, by providing a comparator in response to analog input, storing and outputting the content of an up-down-counter to the latching circuit according to the output of the comparator. CONSTITUTION:In converting three analog inputs into a digital value in binary number and 4 bits, a 4-bit up-down-counter 28 and a comparator 30 are provided. When the analog input 22 to be subjected to A/D conversion is a value AIN shown in one-dot chain line, the output of a comparison element 32 is inverted at a time point St. Thus, if the pulse counting operation of the counter 28 is not active, and when the Q' output of the counter 28 is at ''1'', a latch pulse 40 to latch the content of the counter 28 to a latching circuit 38 is output from a monostable multivibrator 36 of an AND curcyur 34, the circuit of the counter 28 is stored at the circuit 38 and output. Thus, a plurality of analog inputs can be A/D-converted in almost the same time as the conversion requiring time of conventional A/D converters.