JPS54161249A - Digital signal processing circuit - Google Patents

Abstract

PURPOSE:To eliminate influence of a noise component by storing an analog signal with bad S/N in a memory after A/D conversion and then by preventing the conversion of the noise component when the memory output is D/A-converted. CONSTITUTION:With the number of bits of D/A converter 22 set to nine, for example, digital memory 21 consists of nine-bit and three-bit shift registers MSB and LSB and code memory shift register DSB is further provided. Among signals arriving at arithmetic circuit 20 via signal line L1, signals except those for a sign decision are coded by adder-subtracter circuit 20a into 12-bit digital signals, which are stored in shift registers MSB and LSB. The output of MSB is supplied to D/A converter 22, where it is converted into an analog signal. However, zerosign signals stored in LSB are neither outputted to D/A converter 22 nor D/A-converted. Therefore, even if a noise is large, it is not supplied to D/A converter 22 but stored in LSB, so that it will never be converted into an analog signal.