JPS5673948A - Data transmission control system - Google Patents

Data transmission control system

Info

Publication number
JPS5673948A
JPS5673948A JP15015179A JP15015179A JPS5673948A JP S5673948 A JPS5673948 A JP S5673948A JP 15015179 A JP15015179 A JP 15015179A JP 15015179 A JP15015179 A JP 15015179A JP S5673948 A JPS5673948 A JP S5673948A
Authority
JP
Japan
Prior art keywords
data
circuit
frame number
response
reception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15015179A
Other languages
Japanese (ja)
Inventor
Koichi Ooya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15015179A priority Critical patent/JPS5673948A/en
Publication of JPS5673948A publication Critical patent/JPS5673948A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/1607—Details of the supervisory signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To reduce the amount of information of response data and to decrease the response time, by constituting the response data only with frame number without using identifying codes. CONSTITUTION:The 1st device A reads out data according to the instruction of a transmission control circuit 12 from a data buffer 11, it is sectioned into a plurality of blocks and transmitted to a duplex line 16 from an MODEM 15 by adding an error correction bit at a check bit addition circuit 13 and the frame number at a data transmission circuit 14. A data reception circuit 22 picks up the frame number from the reception data and inputs it to a reception control circuit 23. An operation circuit 24 detects the data error and returns the frame number from a response data transmission circuit 26. Thus, the response data is reduced and the transmission efficiency can be increased.
JP15015179A 1979-11-20 1979-11-20 Data transmission control system Pending JPS5673948A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15015179A JPS5673948A (en) 1979-11-20 1979-11-20 Data transmission control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15015179A JPS5673948A (en) 1979-11-20 1979-11-20 Data transmission control system

Publications (1)

Publication Number Publication Date
JPS5673948A true JPS5673948A (en) 1981-06-19

Family

ID=15490605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15015179A Pending JPS5673948A (en) 1979-11-20 1979-11-20 Data transmission control system

Country Status (1)

Country Link
JP (1) JPS5673948A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61500142A (en) * 1983-10-03 1986-01-23 アメリカン テレフオン アンド テレグラフ カムパニ− Data communication method and circuit
JPS6395754A (en) * 1986-10-09 1988-04-26 Fujitsu Ltd Reception order number setting system
JPS63287130A (en) * 1987-05-19 1988-11-24 Sanyo Electric Co Ltd Data mutual transfer system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61500142A (en) * 1983-10-03 1986-01-23 アメリカン テレフオン アンド テレグラフ カムパニ− Data communication method and circuit
JPS6395754A (en) * 1986-10-09 1988-04-26 Fujitsu Ltd Reception order number setting system
JPS63287130A (en) * 1987-05-19 1988-11-24 Sanyo Electric Co Ltd Data mutual transfer system

Similar Documents

Publication Publication Date Title
JPS56111353A (en) Transmitting method for control information using common transmission line
ATE60678T1 (en) TRANSMISSION METHOD.
JPS5673948A (en) Data transmission control system
JPS5386105A (en) Signal transmission system
GB2229066A (en) Data transmission method
JPS57166640A (en) Data transmission converting system of buffer device
JPS53123612A (en) Transmission output control system
JPS5342602A (en) Transmission control system
JPS54102818A (en) Data frame transmission system
JPS5452922A (en) Data preset system
JPS5523634A (en) Facsimile system
JPS54134940A (en) Communication controller
JPS57202150A (en) Reception information checking method
JPS56166696A (en) One-wire remote control system
JPS5413208A (en) Facsimile communication system
JPS6468052A (en) Modem telephone set
JPS5322322A (en) Erroneous input correction system of printer
JPS5476033A (en) Interruption method for high-level data transmission control system
JPS54128204A (en) Block transmission system
JPS5429901A (en) Data transmission control system
JPS54108504A (en) Data transmission system on start-stop system
JPS5739446A (en) Communication control device
JPS54128203A (en) Data transfer method for high level transmission control procedure
JPS5748129A (en) Input data correction system
JPS5586237A (en) Bit rate conversion system