JPS5668875A - Binary system - Google Patents

Binary system

Info

Publication number
JPS5668875A
JPS5668875A JP14480879A JP14480879A JPS5668875A JP S5668875 A JPS5668875 A JP S5668875A JP 14480879 A JP14480879 A JP 14480879A JP 14480879 A JP14480879 A JP 14480879A JP S5668875 A JPS5668875 A JP S5668875A
Authority
JP
Japan
Prior art keywords
signal
circuit
binary
output
mij
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14480879A
Other languages
Japanese (ja)
Inventor
Hideo Masaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14480879A priority Critical patent/JPS5668875A/en
Publication of JPS5668875A publication Critical patent/JPS5668875A/en
Pending legal-status Critical Current

Links

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  • Image Processing (AREA)

Abstract

PURPOSE: To obtain a binary signal required for character recognition, by referring to brightness of picture elements near the object picture element by setting a slice level on a basis of the peak value or the average value of the electric signal.
CONSTITUTION: Recorded characters on recording medium 11 are scanned by image sensor 13 and are converted to an electric signal and are supplied to sample hole circuit 15 through amplifier 14. The output signal sampled at every fixed period by circuit 15 is converted digitally by A/D converter 16 to output multilevel digital signal Mij (i and j are the line number of each picture element and the column number respectively). This digital signal Mij is supplied to the first binary circuit 17 and the second binary circuit 18, and this signal is made binary with the slice level based on the peak value at every fixed time by circuit 17 to output the first binary signal Mij. Picture elements near the object picture element are referred to by circuit 18 to output the second binary signal Lij based on the slice level corresponding to the delay signal, and a correct binary signal is obtained on a basis of signals Hij and Lij by linkage circuit 19.
COPYRIGHT: (C)1981,JPO&Japio
JP14480879A 1979-11-08 1979-11-08 Binary system Pending JPS5668875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14480879A JPS5668875A (en) 1979-11-08 1979-11-08 Binary system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14480879A JPS5668875A (en) 1979-11-08 1979-11-08 Binary system

Publications (1)

Publication Number Publication Date
JPS5668875A true JPS5668875A (en) 1981-06-09

Family

ID=15370937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14480879A Pending JPS5668875A (en) 1979-11-08 1979-11-08 Binary system

Country Status (1)

Country Link
JP (1) JPS5668875A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247791A (en) * 1984-05-24 1985-12-07 Toshiba Corp Overlap separating device for fluoroscopic image
JPS63148380A (en) * 1986-12-12 1988-06-21 Fuji Electric Co Ltd Image binarization device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247791A (en) * 1984-05-24 1985-12-07 Toshiba Corp Overlap separating device for fluoroscopic image
JPH0580027B2 (en) * 1984-05-24 1993-11-05 Tokyo Shibaura Electric Co
JPS63148380A (en) * 1986-12-12 1988-06-21 Fuji Electric Co Ltd Image binarization device

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