JPS5664541A - Asynchronous communication system - Google Patents

Asynchronous communication system

Info

Publication number
JPS5664541A
JPS5664541A JP14008079A JP14008079A JPS5664541A JP S5664541 A JPS5664541 A JP S5664541A JP 14008079 A JP14008079 A JP 14008079A JP 14008079 A JP14008079 A JP 14008079A JP S5664541 A JPS5664541 A JP S5664541A
Authority
JP
Japan
Prior art keywords
circuit
data
clock
counter
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14008079A
Other languages
Japanese (ja)
Inventor
Masamichi Hashimoto
Tokuhiro Aritaka
Shinzo Tsurumaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14008079A priority Critical patent/JPS5664541A/en
Publication of JPS5664541A publication Critical patent/JPS5664541A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/20—Repeater circuits; Relay circuits
    • H04L25/24—Relay circuits using discharge tubes or semiconductor devices
    • H04L25/242—Relay circuits using discharge tubes or semiconductor devices with retiming
    • H04L25/245—Relay circuits using discharge tubes or semiconductor devices with retiming for start-stop signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To realize assuredly the setting of the clock for a start-stop synchronous receiving circuit with a simple circuit constitution, by producing the data of 1-bit width at the transmission side and then measuring the time duration at the reception side respectively. CONSTITUTION:The input data having the time duration equivalent to the start bit is supplied through the transmission line 1 and in the form of the received data. This data is sampled through the sampling circuit 2, and the output of this sampling circuit 2 is supplied to the counter 3. Then the clock selection circuit 4 sets the input clock of the start-stop synchronous receiving circuit 5 in a correct way according to the value of the counter 3.
JP14008079A 1979-10-30 1979-10-30 Asynchronous communication system Pending JPS5664541A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14008079A JPS5664541A (en) 1979-10-30 1979-10-30 Asynchronous communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14008079A JPS5664541A (en) 1979-10-30 1979-10-30 Asynchronous communication system

Publications (1)

Publication Number Publication Date
JPS5664541A true JPS5664541A (en) 1981-06-01

Family

ID=15260488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14008079A Pending JPS5664541A (en) 1979-10-30 1979-10-30 Asynchronous communication system

Country Status (1)

Country Link
JP (1) JPS5664541A (en)

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