ES448469A1 - A system of data transmission in binary series. (Machine-translation by Google Translate, not legally binding) - Google Patents

A system of data transmission in binary series. (Machine-translation by Google Translate, not legally binding)

Info

Publication number
ES448469A1
ES448469A1 ES448469A ES448469A ES448469A1 ES 448469 A1 ES448469 A1 ES 448469A1 ES 448469 A ES448469 A ES 448469A ES 448469 A ES448469 A ES 448469A ES 448469 A1 ES448469 A1 ES 448469A1
Authority
ES
Spain
Prior art keywords
clock
transmission
translation
machine
legally binding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES448469A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES448469A1 publication Critical patent/ES448469A1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/044—Speed or phase control by synchronisation signals using special codes as synchronising signal using a single bit, e.g. start stop bit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Abstract

A binary serial data transmission system, for data streams consisting of at least one bit. This system has a transmission part that has a transmission device controlled by a transmission clock to send binary data streams to a transmission channel, and elements to add a header to each train, and also a reception part with a device of reception controlled by a reception clock synchronized by the received signals. The system being characterized in that the receiving clock, at the receiving end, has a multiple phase circuit connected to the output of a clock frequency signal generator and a clock signal selection circuit, whose inputs for the signals to be selected are: connected to the outputs of the multiple-phase circuit, whose activation input is connected to the input of the receiving device to be started by the header, and whose reset input is connected to the output of a detector of end of train. (Machine-translation by Google Translate, not legally binding)
ES448469A 1975-06-02 1976-06-02 A system of data transmission in binary series. (Machine-translation by Google Translate, not legally binding) Expired ES448469A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7517125A FR2313827A1 (en) 1975-06-02 1975-06-02 Binary elements train transmission system - has simple means of synchronising receiver timer, this timer having multiphase circuit

Publications (1)

Publication Number Publication Date
ES448469A1 true ES448469A1 (en) 1977-07-01

Family

ID=9155941

Family Applications (1)

Application Number Title Priority Date Filing Date
ES448469A Expired ES448469A1 (en) 1975-06-02 1976-06-02 A system of data transmission in binary series. (Machine-translation by Google Translate, not legally binding)

Country Status (3)

Country Link
BE (1) BE842481A (en)
ES (1) ES448469A1 (en)
FR (1) FR2313827A1 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1174392B (en) * 1978-09-08 1987-07-01 Italiana Telecumunicazioni Sie CIRCUITIVE PROVISION FOR THE GENERATION OF THE SAMPLES PULSES, ENTITY OF A DATA TRANSMISSION SYSTEM
FR2462825A1 (en) * 1979-07-27 1981-02-13 Thomson Csf METHOD AND DEVICE FOR SETTING UP A LOCAL CLOCK
FR2491703B1 (en) * 1980-10-03 1988-04-29 Thomson Csf COMPRESSION DEVICE AND TEMPORAL DATA DECOMPRESSION DEVICE AND TRANSMISSION SYSTEM COMPRISING AT LEAST ONE OF SUCH DEVICES
FR2527029A1 (en) * 1982-05-14 1983-11-18 Thomson Csf Mat Tel TRANSMITTER AND DATA RECEIVER IN PACKET MODE
JPS60204121A (en) * 1984-03-29 1985-10-15 Fujitsu Ltd Phase synchronization circuit
NL8600613A (en) * 1986-03-10 1987-10-01 At & T & Philips Telecomm WIDEBAND SPACE SWITCH NETWORK AND PARALLEL SERIES CONVERTER AND SERIES PARALLEL CONVERTER FOR APPLICATION IN SUCH SPACE SWITCH NETWORK.
US4736462A (en) * 1986-03-20 1988-04-05 American Telephone And Telegraph Company, At&T Bell Laboratories Photonic switching
FR2613893B1 (en) * 1987-04-10 1993-10-22 France Telediffusion METHOD FOR SWITCHING ASYNCHRONOUS DIGITAL SIGNALS, AND DEVICE FOR CARRYING OUT SAID METHOD
FR2658015B1 (en) * 1990-02-06 1994-07-29 Bull Sa LOCKED PHASE CIRCUIT AND RESULTING FREQUENCY MULTIPLIER.
FR2664769A1 (en) * 1990-07-11 1992-01-17 Bull Sa DATA SAMPLING DEVICE AND DATA DIGITAL TRANSMISSION SYSTEM THEREOF.

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1295598B (en) * 1968-04-20 1969-05-22 Telefunken Patent Procedure for secure data transmission
FR2054920A5 (en) * 1969-07-31 1971-05-07 Constr Telephoniques
DE2008586C3 (en) * 1970-02-24 1973-11-15 Standard Elektrik Lorenz Ag, 7000 Stuttgart Method and circuit arrangement for writing PCM information into a shift register

Also Published As

Publication number Publication date
FR2313827A1 (en) 1976-12-31
BE842481A (en) 1976-12-02
FR2313827B1 (en) 1979-03-23

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19970612