JPS5658367A - Synchronizing circuit for facsimile receiver - Google Patents

Synchronizing circuit for facsimile receiver

Info

Publication number
JPS5658367A
JPS5658367A JP13459179A JP13459179A JPS5658367A JP S5658367 A JPS5658367 A JP S5658367A JP 13459179 A JP13459179 A JP 13459179A JP 13459179 A JP13459179 A JP 13459179A JP S5658367 A JPS5658367 A JP S5658367A
Authority
JP
Japan
Prior art keywords
signal
synchronizing signal
facsimile
pulse
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13459179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6346633B2 (enrdf_load_stackoverflow
Inventor
Yuji Maruyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13459179A priority Critical patent/JPS5658367A/ja
Publication of JPS5658367A publication Critical patent/JPS5658367A/ja
Publication of JPS6346633B2 publication Critical patent/JPS6346633B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32—Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/36—Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device for synchronising or phasing transmitter and receiver

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Facsimile Transmission Control (AREA)
JP13459179A 1979-10-17 1979-10-17 Synchronizing circuit for facsimile receiver Granted JPS5658367A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13459179A JPS5658367A (en) 1979-10-17 1979-10-17 Synchronizing circuit for facsimile receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13459179A JPS5658367A (en) 1979-10-17 1979-10-17 Synchronizing circuit for facsimile receiver

Publications (2)

Publication Number Publication Date
JPS5658367A true JPS5658367A (en) 1981-05-21
JPS6346633B2 JPS6346633B2 (enrdf_load_stackoverflow) 1988-09-16

Family

ID=15131955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13459179A Granted JPS5658367A (en) 1979-10-17 1979-10-17 Synchronizing circuit for facsimile receiver

Country Status (1)

Country Link
JP (1) JPS5658367A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6346633B2 (enrdf_load_stackoverflow) 1988-09-16

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