JPS5658330A - Output buffer circuit - Google Patents

Output buffer circuit

Info

Publication number
JPS5658330A
JPS5658330A JP13537979A JP13537979A JPS5658330A JP S5658330 A JPS5658330 A JP S5658330A JP 13537979 A JP13537979 A JP 13537979A JP 13537979 A JP13537979 A JP 13537979A JP S5658330 A JPS5658330 A JP S5658330A
Authority
JP
Japan
Prior art keywords
push
buffer
power supply
gates
sufficiently
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13537979A
Other languages
Japanese (ja)
Inventor
Akiyoshi Kanuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13537979A priority Critical patent/JPS5658330A/en
Publication of JPS5658330A publication Critical patent/JPS5658330A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425Multistate logic
    • H03K19/09429Multistate logic one of the states being the high impedance or floating state

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To minimize the leakage at high impedance, by setting ''0'' level potential sufficiently lower, through the control of the power supply voltage itself for E (enhancement)/D (depression) type gates, driving buffers. CONSTITUTION:For the drive of a buffer 1 of totem pole type consisting of E type MOSFETs T1, T2, a push-pull circuit of E/D gates 2, 3 is used. By controlling the impedance of the power supply voltage side MOSFETs 4-7 of this push-pull circuit, a voltage with sufficiently small level at high impedance is given to the gate of FETs T1, T2. Thus, the leakage current of the buffer 1 can sufficiently be reduced.
JP13537979A 1979-10-19 1979-10-19 Output buffer circuit Pending JPS5658330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13537979A JPS5658330A (en) 1979-10-19 1979-10-19 Output buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13537979A JPS5658330A (en) 1979-10-19 1979-10-19 Output buffer circuit

Publications (1)

Publication Number Publication Date
JPS5658330A true JPS5658330A (en) 1981-05-21

Family

ID=15150327

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13537979A Pending JPS5658330A (en) 1979-10-19 1979-10-19 Output buffer circuit

Country Status (1)

Country Link
JP (1) JPS5658330A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004104754A (en) * 2002-07-15 2004-04-02 Renesas Technology Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004104754A (en) * 2002-07-15 2004-04-02 Renesas Technology Corp Semiconductor device

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