JPS5648786A - Processor for color video signal - Google Patents

Processor for color video signal

Info

Publication number
JPS5648786A
JPS5648786A JP12544579A JP12544579A JPS5648786A JP S5648786 A JPS5648786 A JP S5648786A JP 12544579 A JP12544579 A JP 12544579A JP 12544579 A JP12544579 A JP 12544579A JP S5648786 A JPS5648786 A JP S5648786A
Authority
JP
Japan
Prior art keywords
signal
acc
circuit
burst
amplifying circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12544579A
Other languages
Japanese (ja)
Inventor
Shinichiro Taguchi
Masato Tanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12544579A priority Critical patent/JPS5648786A/en
Publication of JPS5648786A publication Critical patent/JPS5648786A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/79—Processing of colour television signals in connection with recording
    • H04N9/793—Processing of colour television signals in connection with recording for controlling the level of the chrominance signal, e.g. by means of automatic chroma control circuits

Abstract

PURPOSE:To miniaturize color VTR by sharing a burst gate circuit and ACC detecting circuit in a chrominance difference signal ACC loop in recording mode and in reproduction mode. CONSTITUTION:Burst gate circuit 30 is supplied with the output signal of recording ACC amplifying circuit 7 and a reproduced chrominance difference signal from BPF24. In recording mode, a signal input from amplifying circuit 7 is selected with a selective signal from terminal 34 to extract its burst signal and in reproduction mode, the reproduced chrominance difference signal is selected to extract its burst signal. Next, ACC detecting circuit 31, having received them, generates a control voltage proportional to the magnitude of the burst signal from gate circuit 30 and supplies it as gain control signal to amplifying circuit 7 and reproducing ACC amplifying circuit 21 to form an ACC loop.
JP12544579A 1979-09-29 1979-09-29 Processor for color video signal Pending JPS5648786A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12544579A JPS5648786A (en) 1979-09-29 1979-09-29 Processor for color video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12544579A JPS5648786A (en) 1979-09-29 1979-09-29 Processor for color video signal

Publications (1)

Publication Number Publication Date
JPS5648786A true JPS5648786A (en) 1981-05-02

Family

ID=14910257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12544579A Pending JPS5648786A (en) 1979-09-29 1979-09-29 Processor for color video signal

Country Status (1)

Country Link
JP (1) JPS5648786A (en)

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