JPS5648148A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5648148A
JPS5648148A JP12518179A JP12518179A JPS5648148A JP S5648148 A JPS5648148 A JP S5648148A JP 12518179 A JP12518179 A JP 12518179A JP 12518179 A JP12518179 A JP 12518179A JP S5648148 A JPS5648148 A JP S5648148A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
elements
grooves
mesa grooves
slopes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12518179A
Other languages
Japanese (ja)
Inventor
Keishiro Yonezawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP12518179A priority Critical patent/JPS5648148A/en
Publication of JPS5648148A publication Critical patent/JPS5648148A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Weting (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE:To easily obtain many semiconductor elements with a high yield by providing a semiconductor wafer with mesa grooves after selectively etching electrode layers from both the major surfaces of a semiconductor wafer wherein abrasives are blew from one major surface and the semiconductor wafer is separated from the mesa grooves. CONSTITUTION:Resist masks 25, 26 are applied to both the major surfaces of a semiconductor wafer 10 having a P-N junction 14 and Al films 15 are etched by an HF solution. Then, a photo etching is applied with a mixed solution of HF and HNO3 to make mesa grooves 27, 28. The masks 26 are fixed to a glass sheet 19 by wax 18. And the mesa grooves 27 are grinded by blowing SiC powders 23 to form elements 1b having slopes 17b around the circumference. The elements 1b also have slopes in the reverse direction by the grooves 28. The elements 1b will be obtained by applying the removal of etching to damaged layers 24 caused by grinding and by removing the resists 25, 26. No acute angles at angular sections will eliminate a broken fault and grinding hours will be reduced compared to a convertional adhering sheet or metal disc.
JP12518179A 1979-09-27 1979-09-27 Manufacture of semiconductor device Pending JPS5648148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12518179A JPS5648148A (en) 1979-09-27 1979-09-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12518179A JPS5648148A (en) 1979-09-27 1979-09-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5648148A true JPS5648148A (en) 1981-05-01

Family

ID=14903894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12518179A Pending JPS5648148A (en) 1979-09-27 1979-09-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5648148A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992009098A2 (en) * 1990-11-05 1992-05-29 Harris Corporation Process for forming extremely thin integrated circuit dice
JPH04277625A (en) * 1991-03-05 1992-10-02 Murata Mfg Co Ltd Method for working chip type electronic component
WO2001075954A1 (en) * 2000-03-31 2001-10-11 Toyoda Gosei Co., Ltd. Method for dicing semiconductor wafer into chips

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992009098A2 (en) * 1990-11-05 1992-05-29 Harris Corporation Process for forming extremely thin integrated circuit dice
WO1992009098A3 (en) * 1990-11-05 1992-07-09 Harris Corp Process for forming extremely thin integrated circuit dice
JPH04277625A (en) * 1991-03-05 1992-10-02 Murata Mfg Co Ltd Method for working chip type electronic component
WO2001075954A1 (en) * 2000-03-31 2001-10-11 Toyoda Gosei Co., Ltd. Method for dicing semiconductor wafer into chips
US7121925B2 (en) 2000-03-31 2006-10-17 Toyoda Gosei Co., Ltd. Method for dicing semiconductor wafer into chips

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