JPS5646226A - Manufacture of mask for integrated circuit - Google Patents

Manufacture of mask for integrated circuit

Info

Publication number
JPS5646226A
JPS5646226A JP12084979A JP12084979A JPS5646226A JP S5646226 A JPS5646226 A JP S5646226A JP 12084979 A JP12084979 A JP 12084979A JP 12084979 A JP12084979 A JP 12084979A JP S5646226 A JPS5646226 A JP S5646226A
Authority
JP
Japan
Prior art keywords
mask
substrate
chamber
evacuated
master
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12084979A
Other languages
Japanese (ja)
Other versions
JPS6142259B2 (en
Inventor
Hiroshi Shimizu
Takao Kagii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP12084979A priority Critical patent/JPS5646226A/en
Publication of JPS5646226A publication Critical patent/JPS5646226A/en
Publication of JPS6142259B2 publication Critical patent/JPS6142259B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To prevent the damage of a master mask due to electrostatic discharge by introducing an ionized gas to neutralize static electricity before separating the master mask closely contacting with a substrate for a copy mask. CONSTITUTION:Master mask 11 is mounted on support stand 12, and airtight chamber 13 is evacuated through small hole 14. Substrate 15 for a copy mask is mounted on support stand 16, airtight chamber 17 is evacuated through small hole 18, and airtight chamber 19 where mask 11 and substrate 15 closely contact with each other is also evacuated. Next, chamber 13 alone is returned to atmospheric pressure, and mask 11 is irradiated with ultraviolet rays from the rear side to expose a resist film on substrate 15. An ionized gas is then introduced into chamber 19 to neutralize static electricity generated on the contact surfaces, and while feeding the gas to atmospheric pressure, chamber 13 of the mask 11 side is evacuated to separate the contact surfaces of mask 11 and substrate 15.
JP12084979A 1979-09-21 1979-09-21 Manufacture of mask for integrated circuit Granted JPS5646226A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12084979A JPS5646226A (en) 1979-09-21 1979-09-21 Manufacture of mask for integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12084979A JPS5646226A (en) 1979-09-21 1979-09-21 Manufacture of mask for integrated circuit

Publications (2)

Publication Number Publication Date
JPS5646226A true JPS5646226A (en) 1981-04-27
JPS6142259B2 JPS6142259B2 (en) 1986-09-19

Family

ID=14796463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12084979A Granted JPS5646226A (en) 1979-09-21 1979-09-21 Manufacture of mask for integrated circuit

Country Status (1)

Country Link
JP (1) JPS5646226A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62172323A (en) * 1986-01-27 1987-07-29 Fujitsu Ltd Rubbing method for liquid crystal display plate
FR2629605A1 (en) * 1988-03-29 1989-10-06 Francou Marc Method for manufacturing microelectronic semiconductor components in microlithography by hard contact and corresponding microelectronic semiconductor components

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH069875U (en) * 1992-07-12 1994-02-08 コスモ石油株式会社 Ratchet wrench

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62172323A (en) * 1986-01-27 1987-07-29 Fujitsu Ltd Rubbing method for liquid crystal display plate
FR2629605A1 (en) * 1988-03-29 1989-10-06 Francou Marc Method for manufacturing microelectronic semiconductor components in microlithography by hard contact and corresponding microelectronic semiconductor components

Also Published As

Publication number Publication date
JPS6142259B2 (en) 1986-09-19

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