JPS5625888A - Return signal output circuit for exclusive line multiple transmission system terminal unit - Google Patents
Return signal output circuit for exclusive line multiple transmission system terminal unitInfo
- Publication number
- JPS5625888A JPS5625888A JP10241479A JP10241479A JPS5625888A JP S5625888 A JPS5625888 A JP S5625888A JP 10241479 A JP10241479 A JP 10241479A JP 10241479 A JP10241479 A JP 10241479A JP S5625888 A JPS5625888 A JP S5625888A
- Authority
- JP
- Japan
- Prior art keywords
- output
- counter
- return signal
- input
- transmission system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q9/00—Arrangements in telecontrol or telemetry systems for selectively calling a substation from a main station, in which substation desired apparatus is selected for applying a control signal thereto or for obtaining measured values therefrom
Landscapes
- Small-Scale Networks (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Time-Division Multiplex Systems (AREA)
- Communication Control (AREA)
- Selective Calling Equipment (AREA)
Abstract
PURPOSE:To enable to obtain stable return signal period through the input of counter clock from the logic circuit, by constituting the terminal monitor input of terminal unit and the return signal output section with logic circuits, in the exclusive line multiple transmission system. CONSTITUTION:When the input contact SW1 is on, the waveform differentiated at the differentiation circuit 51 is input to FF1 and counter T, FF1 is set and recorded in on-state, and the counter T is reset. When the address signal from the master unit is in agreement with the address of the terminal, while the return signal is delivered from the logic circuit 4, the address coincidence signal is counted at the counter T with the output of the gate CAG, the on-state of the input contact SW1 is returned with the 1st count output Q0, the off-state is returned with the output Q1 at the 2nd count, FF1-FF3 are reset with the output Q2 at the 3rd count, and since the output of the inverter G8 is zero, the clock input of the counter T is stopped.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54102414A JPS5929999B2 (en) | 1979-08-10 | 1979-08-10 | Return signal output circuit for leased line multiplex transmission system terminal equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54102414A JPS5929999B2 (en) | 1979-08-10 | 1979-08-10 | Return signal output circuit for leased line multiplex transmission system terminal equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5625888A true JPS5625888A (en) | 1981-03-12 |
JPS5929999B2 JPS5929999B2 (en) | 1984-07-24 |
Family
ID=14326777
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54102414A Expired JPS5929999B2 (en) | 1979-08-10 | 1979-08-10 | Return signal output circuit for leased line multiplex transmission system terminal equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5929999B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59164600U (en) * | 1983-04-18 | 1984-11-05 | 池田物産株式会社 | Pull structure of surface material for vehicle seats |
JPH0386000U (en) * | 1989-08-25 | 1991-08-30 |
-
1979
- 1979-08-10 JP JP54102414A patent/JPS5929999B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5929999B2 (en) | 1984-07-24 |
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