JPS5624971A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reverse withstand voltage of a semiconductor device and to prevent crack of the substrate thereof by forming shallow depth of an isolation layer on a main surface exposed with the PN-junction of a substrate and connecting it with deep isolating layer from the back surface. CONSTITUTION:An SiO2 film 2 is coated on an N<-> type Si substrate 1 having high thickness and large-diameter opening, an opening 2b is perforated at one main surface, and a P type isolating layer 11a having a depth larger than the half of the thickness of the substrate 1 is formed. Then, an opening 2c is perforated at the confronting position with the back surface, the SiO2 film 2 on the surface is removed, and a P type emitter layer 4 and a P type isolation layer 11b connected to the layer 11a are formed thereon. Thereafter, a P type base layer 5 and an N+ type emitter layer 16 are formed as conventionally, electrodes are attached thereto, and the layer 11 is cut at the center. A sufficient depletion layer 12 extended to the N type base layer 7 is created by the shape of the isolation layer according to this configuration enough to enable retension of high reverse withstand voltage. When the P type layer 4 is formed thicker than the conventional one, it is difficult to crack and enables use of the substrate having large bore merely by increasing slightly the ON voltage.