JPS5622297A - Control system for memory unit - Google Patents

Control system for memory unit

Info

Publication number
JPS5622297A
JPS5622297A JP9760479A JP9760479A JPS5622297A JP S5622297 A JPS5622297 A JP S5622297A JP 9760479 A JP9760479 A JP 9760479A JP 9760479 A JP9760479 A JP 9760479A JP S5622297 A JPS5622297 A JP S5622297A
Authority
JP
Japan
Prior art keywords
error
data
block
rewriting
memory unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9760479A
Other languages
Japanese (ja)
Inventor
Shohei Ikehara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9760479A priority Critical patent/JPS5622297A/en
Publication of JPS5622297A publication Critical patent/JPS5622297A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To enable to correct the data without error in normal operating state, by rewriting the block having error in the buffer storage with priority.
CONSTITUTION: If there is any error in the data readout from the block 3, for example, of the buffer storage 2, the error correcting code check circuit 4 delivers the error signal representing the presence of error to the rewriting order control section 7-1. The least recently used unit 7 makes control so that the rewriting to this block B3 is made with the highest priority, if the data block picked up from the main memory unit 5 is present next. Accordingly, when the data block picked up from the unit 5 is transferred, new data is given to the data block where this error is present. Thus, rewriting to the data without error can be made with comparatively short time.
COPYRIGHT: (C)1981,JPO&Japio
JP9760479A 1979-07-31 1979-07-31 Control system for memory unit Pending JPS5622297A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9760479A JPS5622297A (en) 1979-07-31 1979-07-31 Control system for memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9760479A JPS5622297A (en) 1979-07-31 1979-07-31 Control system for memory unit

Publications (1)

Publication Number Publication Date
JPS5622297A true JPS5622297A (en) 1981-03-02

Family

ID=14196820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9760479A Pending JPS5622297A (en) 1979-07-31 1979-07-31 Control system for memory unit

Country Status (1)

Country Link
JP (1) JPS5622297A (en)

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