JPS5677966A - Buffer memory control system - Google Patents

Buffer memory control system

Info

Publication number
JPS5677966A
JPS5677966A JP15271579A JP15271579A JPS5677966A JP S5677966 A JPS5677966 A JP S5677966A JP 15271579 A JP15271579 A JP 15271579A JP 15271579 A JP15271579 A JP 15271579A JP S5677966 A JPS5677966 A JP S5677966A
Authority
JP
Japan
Prior art keywords
block
data
replace
oldest
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15271579A
Other languages
Japanese (ja)
Other versions
JPS5856175B2 (en
Inventor
Akiyoshi Kajiyama
Kazuyuki Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54152715A priority Critical patent/JPS5856175B2/en
Publication of JPS5677966A publication Critical patent/JPS5677966A/en
Publication of JPS5856175B2 publication Critical patent/JPS5856175B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To prevent the same area from being designated as the buffer writing block when the overlapped blocks are transferred, by adding the second oldest block number deciding circuit in addition to the oldest block number deciding circuit.
CONSTITUTION: The contents of the replace memory 1 are renewed with every access given to the buffer memory, and the fact that the block containing the data received an access is the latest is recorded. In case the necessary data does not exist in the buffer memory, the block number to be expelled in decided based on the reading data of the replace memory. Then the new data is transferred in block to this position from the main memory. In case the block transfer which is already under process does not exist, the subject block number of the replace is decided by the oldest data block number deciding circuit 2. When the block transfer already under process exists, the subject block of the replace is decided by the second oldest data block deciding circuit 3.
COPYRIGHT: (C)1981,JPO&Japio
JP54152715A 1979-11-26 1979-11-26 Buffer memory control method Expired JPS5856175B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54152715A JPS5856175B2 (en) 1979-11-26 1979-11-26 Buffer memory control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54152715A JPS5856175B2 (en) 1979-11-26 1979-11-26 Buffer memory control method

Publications (2)

Publication Number Publication Date
JPS5677966A true JPS5677966A (en) 1981-06-26
JPS5856175B2 JPS5856175B2 (en) 1983-12-13

Family

ID=15546565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54152715A Expired JPS5856175B2 (en) 1979-11-26 1979-11-26 Buffer memory control method

Country Status (1)

Country Link
JP (1) JPS5856175B2 (en)

Also Published As

Publication number Publication date
JPS5856175B2 (en) 1983-12-13

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