JPS5621070A - Automatic control circuit for bias of indicator - Google Patents

Automatic control circuit for bias of indicator

Info

Publication number
JPS5621070A
JPS5621070A JP9654579A JP9654579A JPS5621070A JP S5621070 A JPS5621070 A JP S5621070A JP 9654579 A JP9654579 A JP 9654579A JP 9654579 A JP9654579 A JP 9654579A JP S5621070 A JPS5621070 A JP S5621070A
Authority
JP
Japan
Prior art keywords
voltage
voltmeter
scale
bias
indicator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9654579A
Other languages
Japanese (ja)
Inventor
Yutaka Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jeol Ltd
Original Assignee
Jeol Ltd
Nihon Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jeol Ltd, Nihon Denshi KK filed Critical Jeol Ltd
Priority to JP9654579A priority Critical patent/JPS5621070A/en
Publication of JPS5621070A publication Critical patent/JPS5621070A/en
Pending legal-status Critical Current

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Landscapes

  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)

Abstract

PURPOSE: To simplify operation by automatically giving an appropriate bias value of a bias circuit connected with a high sensitivity voltmeter in series.
CONSTITUTION: A standard voltage Va is set at the full-scale voltage of a voltmeter 8, i.e., the difference between the highest voltage VH of the scale and the lowest voltage of VL of the scale. When a resolution signal Vr corresponding to the peak voltage v-mode NMR signals obtained from an NMR device is Vr<Va, comparators 3W6 do not operate and the output of an adder 7 therefore returns to zero and the voltmeter 8 indicates a voltage VM without deflecting fully. As the resolution signal Vr increases, the pointer returns to zero each time the Vr reaches Va, 2Va, 3Va and 4Va, and thus the over-deflection of the pointer is prevented.
COPYRIGHT: (C)1981,JPO&Japio
JP9654579A 1979-07-28 1979-07-28 Automatic control circuit for bias of indicator Pending JPS5621070A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9654579A JPS5621070A (en) 1979-07-28 1979-07-28 Automatic control circuit for bias of indicator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9654579A JPS5621070A (en) 1979-07-28 1979-07-28 Automatic control circuit for bias of indicator

Publications (1)

Publication Number Publication Date
JPS5621070A true JPS5621070A (en) 1981-02-27

Family

ID=14168062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9654579A Pending JPS5621070A (en) 1979-07-28 1979-07-28 Automatic control circuit for bias of indicator

Country Status (1)

Country Link
JP (1) JPS5621070A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178264A (en) * 1982-04-12 1983-10-19 Advantest Corp Digital resistance measuring apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178264A (en) * 1982-04-12 1983-10-19 Advantest Corp Digital resistance measuring apparatus

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