JPS5619227A - A/d converter - Google Patents

A/d converter

Info

Publication number
JPS5619227A
JPS5619227A JP9374479A JP9374479A JPS5619227A JP S5619227 A JPS5619227 A JP S5619227A JP 9374479 A JP9374479 A JP 9374479A JP 9374479 A JP9374479 A JP 9374479A JP S5619227 A JPS5619227 A JP S5619227A
Authority
JP
Japan
Prior art keywords
converter
bit
voltage
bits
processes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9374479A
Other languages
Japanese (ja)
Other versions
JPS6243571B2 (en
Inventor
Yasunori Kanazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9374479A priority Critical patent/JPS5619227A/en
Publication of JPS5619227A publication Critical patent/JPS5619227A/en
Publication of JPS6243571B2 publication Critical patent/JPS6243571B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To decrease the number of the high-accuracy component parts used, by using several times the D/A converter having a smaller number of bits than that required for the A/D converter and thus obtaining a prescribed number of coded bits.
CONSTITUTION: Analog input voltage Va of terminal 1 reaches voltage comparator 2 through the solid-line routes of switch 5. Under these conditions, the processes are given to the 1st bit to the 3rd bit to store voltage Va into temporary memory circuit 6 when these processes are over. Then the analog voltage (output voltage of D/A converter 3) is held 7 when the 3rd bit is finished and then subtracted at 8 from Va. This result of subtraction is amplified at 9 up to full-scale voltage VFS [the gain is enough with 8 (18dB) since converter 3 has 3 bits]. After this, switch 5 is changed over to the position shown by the dotted lines, and the processes are carried out successively by comparing register 4 and converter 3 for the 4th to 6th bits. This redult of process is stored in temporary memory circuit 10. Thus a 6-bit A/D converter is obtained by using 3-bit D/A converter 3 twice and repetitively.
COPYRIGHT: (C)1981,JPO&Japio
JP9374479A 1979-07-25 1979-07-25 A/d converter Granted JPS5619227A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9374479A JPS5619227A (en) 1979-07-25 1979-07-25 A/d converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9374479A JPS5619227A (en) 1979-07-25 1979-07-25 A/d converter

Publications (2)

Publication Number Publication Date
JPS5619227A true JPS5619227A (en) 1981-02-23
JPS6243571B2 JPS6243571B2 (en) 1987-09-16

Family

ID=14090920

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9374479A Granted JPS5619227A (en) 1979-07-25 1979-07-25 A/d converter

Country Status (1)

Country Link
JP (1) JPS5619227A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58167971A (en) * 1982-03-29 1983-10-04 Toshiba Corp Digital type maximum/minimum detection circuit
JPS5999541U (en) * 1982-12-23 1984-07-05 富士電機株式会社 A/D conversion device
JPS59159035U (en) * 1983-04-12 1984-10-25 株式会社ケンウッド D/A converter
JPS6029027A (en) * 1983-07-21 1985-02-14 Nakamichi Corp Signal converting circuit
JPH02209019A (en) * 1989-01-20 1990-08-20 John Fluke Mfg Co Inc Input signal easuring method and device and analog digital connecting circuit
WO2002011290A1 (en) * 2000-07-27 2002-02-07 Hamamatsu Photonics K.K. A/d converter and solid-state camera

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5242057A (en) * 1975-09-30 1977-04-01 Toshiba Corp A-d convertor
JPS5387660A (en) * 1977-01-12 1978-08-02 Hitachi Ltd Multi-channel digital-analogue converter unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5242057A (en) * 1975-09-30 1977-04-01 Toshiba Corp A-d convertor
JPS5387660A (en) * 1977-01-12 1978-08-02 Hitachi Ltd Multi-channel digital-analogue converter unit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58167971A (en) * 1982-03-29 1983-10-04 Toshiba Corp Digital type maximum/minimum detection circuit
JPH0338779B2 (en) * 1982-03-29 1991-06-11 Tokyo Shibaura Electric Co
JPS5999541U (en) * 1982-12-23 1984-07-05 富士電機株式会社 A/D conversion device
JPS59159035U (en) * 1983-04-12 1984-10-25 株式会社ケンウッド D/A converter
JPS6029027A (en) * 1983-07-21 1985-02-14 Nakamichi Corp Signal converting circuit
JPH02209019A (en) * 1989-01-20 1990-08-20 John Fluke Mfg Co Inc Input signal easuring method and device and analog digital connecting circuit
WO2002011290A1 (en) * 2000-07-27 2002-02-07 Hamamatsu Photonics K.K. A/d converter and solid-state camera
JP2002043941A (en) * 2000-07-27 2002-02-08 Hamamatsu Photonics Kk Analog/digital converter and solid-state image pickup device
US6670903B2 (en) 2000-07-27 2003-12-30 Hamamatsu Photonics K.K. A/D converter and solid-state camera
JP4489914B2 (en) * 2000-07-27 2010-06-23 浜松ホトニクス株式会社 A / D converter and solid-state imaging device

Also Published As

Publication number Publication date
JPS6243571B2 (en) 1987-09-16

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