SU869025A1 - Analogue-digital converter - Google Patents

Description

(54) ANALOG-DIGITAL CONVERTER

one

The invention relates to a computational and informational measuring technique and is intended for use in analog value conversion devices (coding).

Known analog-to-digital Converter (ADC), containing a counter, a digital-to-analog converter (DAC), a comparator, a key, and a clock pulse generator 1.

This ADC is complex and has a low speed, which is determined by the speed of the counter, DAC, and comparator. Moreover, the devices ensuring the operation of the ADC at certain stages operate in key modes, which also reduces the speed of the ADC.

An analog-to-digital converter is known, which contains a breaker, a unit for changing voltage levels to a constant value, rectifiers, amplifiers and null organs. In this case, the input of the ADC is a breaker, the output of which is connected to the input of the first conversion stage, consisting of series-connected blocks, changing the voltage level to a constant value, the rectifier and the amplifier, the output of the amplifier is

the input of the next exactly the same transformation, etc. In addition, in each cascade of the output of the block and voltage level of a constant value are connected by cc inputs of null-orgs, the outputs of the latter are the outputs of the entire device {2.

About The disadvantage of this ADC is the presence in it of N series-connected conversion stages, the koikd of which consists of a device for changing the voltage level

15 constant value, rectifier and amplifier. Since the individual elements of the conversion stages in this device are not identical, the dingy conversion error increases as the stages (bits) of the ADC increase due to the variation in the parameters of the devices for changing the voltage level by a constant value (transfer ratios),

25; straighteners (initial sections, steepness) and amplifiers (gain). With a large number of cascades N, the variation of the parameters of these elements will lead to an increase

30 conversion error, which is a significant disadvantage of this N-bit ADC. The purpose of the invention is to increase the accuracy of the conversion. The goal has been achieved by the fact that an analog-to-digital converter containing a switch, the first input of which is connected to the input bus, an amplifier whose output is connected to the first input of the reading unit, and the phase detector to the output of the second , a limiter and a control unit are introduced, the output of which is connected to the second input of the switch, the third input of which is connected to the output of the subtractive unit and the first input of the detector, and the output is connected to the input of the amplifier and through the limiter to the second input do subtractive unit and the second input phase detector. The drawing shows a structural diagram of an analog-digital converter. The proposed device contains a switch 1, a limiter 2, an amplifier 3, a subtracting unit 4, a phase detector 5, a null organ b, a control block 7, an input bus 8. The device operates as follows. The input of the ADC receives an uninterrupted complex radio signal, which is an additive mixture of the useful signal and noise UJ (t)) (i At the beginning of the ADC's work cycle, the input of amplifier 3 during the time v required for conversion in the cad, consisting of limiter 2, the amplifier 3, the subtractive blaster 4 and the phase detector 5, is connected to the input of the ADC via switch 1 At the output of the amplitude limiter 2, we have the voltage) And the input signal, and the coefficient The gain of amplifier K 3 is set equal to 2, i.e. EQ A. K 2 At the output of subtractive unit 4, after a single conversion, the following voltage is obtained U, (t) l.-bic KUexW-UoTp () urA (t) - Iwot 4 (tO ga output, phase detector 5 posAe single conversion, the differential frequency signal U (t), c, xrMt) is separated. This voltage goes to zero organ b, where its sign is determined, i.e. the value of the code element in higher order. If U (t) 0, i.e. A (t) -3- (since), then the value of TTit of an element of a higher-order code is equal to one, if U (t) 0, then the value of an element of a code of a higher-order bit is zero. After time C after the start of the ADC cycle, the control unit 7 switches the switch 1 to the position, at which the voltage U (t} from the output of the subtractor 4 through the switch 1 enters the inputs of the limiter 2 and the amplifier 3. From this moment the code begins to be determined in the next level. The inputs of the subtracting unit 4 .peduce the voltages of the negatives (and, W ,, (t) 4tA (i) I.) from the outputs of the limiter 2 and the amplifier 3, respectively. U / (t) u, Ch (bui ("p (-1) g 4 Mt; -1A" d Jcos cOol V (t) J N the output of the phase detector 5 after the double conversion, the voltage UJt is introduced) of the difference frequency Ua (MA q tA {tv | A, which again goes to the input of the zero-organ 6, where the sign of this voltage is determined. Similar to the previous one, the code element the discharge is assigned the value of unity, if A (t) I Tai and zero, if A (t) |, Then the voltage U, 2 (t) from the output of the subtracting unit 4 is fed to the inputs of limiter 2 and amplifier 3, where the value of code element in the next bit, etc. until the value of the code element in the lower order is determined. The number of bits N in the proposed ADC is determined by the formula. where T is the duration of the operation cycle of the entire ADC, or the switching period of the electronic switch 1; - the time required for a single conversion in the cascade. After determining the code value in the low-order bit, the control unit 7 switches the switch 1 to the position C, at which a new ADC operation cycle begins. Thus, the null authority 6 causes the sequence O and 1, the time interval between which is equal to the time of the C transformation in one stage.

The sequence O and 1 corresponds to the serial code of the input quantity at the time of measurement.

The duration of the full cycle of the proposed ADC is N times the time V of a single conversion in the cascade / therefore, the speed of the proposed ADC is not worse than the known ADC. In the proposed device, the input value is repeatedly converted in the same conversion stage, so the dynamic conversion error in it is less than in the known ADC due to the exclusion of the non-identical characteristic of the conversion stages.

Higher accuracy in converting ADCs significantly reduces the error in converting analog information to digital and improves the quality of the conversion. Fool Lula invention

AN aloha-digital pre-tello ate containing the switch, the first

the input of which is connected to the input bus, the amplifier whose output is connected to the first input of the subtracting unit, and the phase detector, the output of which is connected to the input of the null organ, that is, in order to increase the accuracy of the conversion, a limiter and a control unit are inserted into it The output of which is connected to the second input of the switch, the third input of which is connected to the output of the reading unit and the first input of the phase detector, and the output is connected to the input of the amplifier and, via a limiter, to the second input of the reading unit and to5 rum input of the phase detector.

Information sources, . taken into account during the examination

1. Foreign Radio Electronics, 1975, 1, p. 66

2. Khrizman S.S. Digital measuring devices. Kiev, 1963, p. 43.

Claims (1)

Claim An analog-to-digital converter comprising a switch, the first input of which is connected to the input bus, an amplifier whose output is connected to the first input of the subtracting unit, and a phase detector, the output of which is connected to the input of the zero-organ, characterized in that in order to improve the conversion accuracy, a limiter and a control unit are introduced into it, the output of which is connected to the second input of the switch, the third input of which is connected to the output of the subtracting unit and the first input of the phase detector, and the output is connected to the input of the amplifier and through the limiter to the second input of the subtracting unit and the second input of the phase detector.