SU754326A1 - Digital phase meter - Google Patents

Description

The invention relates to a phase-measuring technique and can be used to create high-precision wideband digital phase meters with a wide dynamic range of input voltages, designed to measure the phase shift between two sinusoidal voltages.

There is a device containing a frequency multiplier, the input of which is connected to the first input terminal of the phase meter, and the output to the input of the ring shift register, two channels for storing and recovering the signals under study, whose outputs are connected to the inputs of the null indicator, two scaling circuits, to the first inputs which are connected to the outputs of the null indicator, and to the second inputs of the connected pulse generator. The outputs of each of the scaling circuits are connected respectively to the first and second channels of signal recovery, and the second output of one of the counting circuits is connected to the digital input.

dikagorom. On memory devices using a ring shift register, a series of instantaneous values of the compared voltages are fixed, evenly distributed within their period.

Using two scaling circuits, sequential cyclic reading of the stored voltages is performed. Filters isolate the first harmonics of these voltages and feed them to a null indicator that controls the phase difference of the recalculating circuits. When the input voltages of the null indicator are applied, the value of the measured phase shift is determined by the phase shift of the recalculated voltage circuits, which is recorded by the digital indicator [1 ^.

The disadvantage of such a device is the presence of an error due to the distortion of the shape of the restored signals when they are read (due to the non-identical channels of memorization and reading of each sample), as well as the limitation of the operating frequency range from below

3

754326

the final storage time of the stored instantaneous values of the investigated stresses.

The closest in technical essence to the present invention is a well-known digital phase meter containing a frequency multiplier, the input of which is connected to the first input bus of the phase meter, the output of the multiplier is connected to the gate generating unit (coincidence element, two ring shift registers, group of elements AND, element OR, and driver gating pulses), two gating units, the first inputs of which are connected respectively to the input terminals of the phase meter, and the second inputs are connected to the output of the shaping unit page encircling pulses, two analog-to-digital converters, the first outputs of which are connected to the control inputs of the gating pulse shaping unit, and the second outputs through serially connected random access memory, digital-analog converters and filters connected to the inputs of the zero-indicator, the output of which is connected to the input of the phase shift measure (two scaling circuit and pulse generator). The second inputs of the operational storage devices are connected to the control outputs of the phase shift measure, the output of which is connected to the input of the digital indicator. With the help of gating blocks, the instantaneous values of the investigated voltages are simultaneously fixed in both channels, converted by analog-digital converters into a code, and entered into operational memory. With the help of scaling circuits and digital-analog converters, the voltages under study are restored and their phase shift is measured [2 ^.

Disadvantages phasemeter - limiting the dynamic range of input ⁴⁵ zheny phasemeter The stresses due to their finite betrayed transducers analog-to-digital converters and the presence of large amplitude-phase measurement error caused by the arrival at the input 50 rows null indicator voltages differing in value within the operating dynamic range of the phase meter.

The purpose of the invention is to improve the measurement accuracy.

This goal is achieved by the fact that the phase meter, which contains the gating pulse shaping unit, whose input is connected to the first input source through a frequency multiplier, two gating units, the first inputs of which are connected to the input sources, and the second inputs to the output a gate forming unit, two analog-to-digital converters whose first outputs are connected to control inputs of a 10 gate generating unit; the second outputs are connected in series e online storage blocks, digital-to-analog converters and filters are connected to the inputs of the null indicator,

15 whose output is connected to the input of the phase shift measure, while the second inputs of the operational storage units are connected to the control outputs of the phase shift measure, which also contains a digital indicator, whose input is connected to the output of the phase shift measure, a reference voltage source is added, two comparators, two integrators, two controlled amplifiers and two 25 detectors, with the output of the reference voltage source connected to the first inputs of the comparators, the output of each of the gating units through a controlled device connected to the input divisor analogo30 digital converter, and the second

the input of each of the controlled amplifiers through the integrator, comparator and detector is connected to the output of the filter.

The drawing shows a block diagram of a digital phase meter.

The phase meter contains a frequency multiplier 1, a gate pulse shaping unit 2, gating blocks 3, 4, controlled amplifiers 5, 6, analog-digital converters 7,

8, operational storage units 9,

10, D / A converters

11, 12, filters 13, 14, zero-indicator 15, a measure of 16 phase shifts, which includes scaling circuits 17, 18 and generator 19, integrators 20, 21, comparators 22, 23, detectors 24, 25, source 26 reference voltage and digital indicator 27.

Phase meter works as follows.

One of the input voltages is fed to the multiplier 1, the output of which receives a voltage that is multiplied in frequency with respect to the input one η times. The voltage from the output of the multiplier 1 is fed to the input of block 2. The control inputs of block 2 receive signals

five

754326

6

control from analog-digital converters 7, 8, at its output receive gating pulses shifted relative to each other by time

T _VK

Where

T „- the period of the input voltage; K - 0,1,2,. . . ;

Ϊ —1,2,3, ...;

P - the serial number of the sample.

ten

Each of these pulses is fed to the inputs of the blocks 3, 4 and captures in each channel of the phase meter instantaneous values (sampling) of the input voltages. Constant memorized voltages stored in this way are fed to controlled amplifiers 5, 6, and from their output to the inputs of converters 7, 8 and further on in the form of codes, to operational storage units 9, 10. 20

The next gating pulse is formed after the conversion of converters 7, 8 of the direct voltage of the previous samples into codes, entering these codes into blocks 9, 10, and applying permission signals to the inputs of block 2.

In this way, the input voltages are sampled and quantized, and the codes, which are proportional to the instantaneous voltages at the sampling points, are memorized.

If the input voltages are

υρΙΙ ^ δίηίωί. + ψ) 'υ _ζ = υ ^ 5ΐηω,

then the blocks 3, 4 are fixed respectively voltage

^and 2 ¹¹ hectares 5 '"(and? ,, _φ ).

representing levels constantly—

35

40

voltage, corresponding to the instantaneous values of the input signals at the moments of gating. 45

At the output of the amplifiers 5, 6 receive voltage, respectively

^and "> ^p . ^and 'g ^and 2p' ^P x,

50

where P), P ₂ - transfer coefficients

direct current respectively controlled amplifiers 5, 6.

Since the regulation of the signal transmission coefficients in the phase meter channels is carried out in dc voltage amplification circuits, amplitude-phase errors do not occur. The voltage codes of each sample from the outputs of the converters 7, 8 are received respectively in blocks 9, 10. The scaling circuits 17, 18 sequentially read these codes and feed them to the converters 11, 12, the output of which generates variable continuous voltages. The main harmonics of these voltages, Schosn ι and 20СН>, selected by filters 13, 14 are fed to the outputs of the null-nkkator 15 and, through the detectors 24, 25, respectively, to the inputs of the comparators 22, 23, where they are compared with the voltage of the voltage source 26 of the reference voltage. The signals of the comparison results from comparators 22, 23 through integrators 20,

21 arrive at amplifiers 5 and 6 and change their transmission coefficients so that the amplitude values of the voltages at the outputs of the filters 13, 14 are equal to the voltage of the reference source E _o , which is chosen taking into account the optimal use of the capabilities of the ADC, i.e. P _g 11th ” ^E then the voltage of the main harmonics at the outputs of the filters 13, 14 can be represented as

^ 2 och ^{54 η} >

where Λ is the circular frequency of the output voltages of the recalculating circuits 17, 18;

ψ, ₂ - the initial phases of these voltages.

Consequently, the inputs of the zero-indicator 15 receive equal voltages. The phase difference of the output voltages of the scaling circuits 17, 18 is changed using the control signals of the null indicator 15 by introducing an appropriate time shift of the filling points of the scaling circuits 17, 18. When the voltages at the input of the null indicator 1 5 are reached, the measured phase shift (p is determined by the shift voltage phases of scaling circuits 17, 18, which is indicated by digital indicator 27 by reading the code of scaling circuit 18 at the moment of overflow of scaling circuit 17.

Measurement resolution

the phase shift is determined by the coefficient

frequency division K ^ signal generator

19 recalculation schemes 17, 18. Difference

754326

eight

phases of the output voltages of these circuits can take discrete values

where VI is an integer, taking values og 1 to k.

When choosing K £ - 36000, the measurement resolution of the phase shift Φ of the phase meter input voltages is 0.01 °. The signals read codes from blocks 9, 10 are formed in the moments of passage of Perez even circuits 17, 18 states—

Thus, the use of controllable amplifiers 5, 6 allows, regardless of the voltage levels at the phase meter inputs, to generate voltages at the inputs of converters 7, 8 given by the reference voltage source 26 and to use the maximum amount of analog-digital converters. This allows you to significantly expand the dynamic range, the input voltages of the phase meter, improve the coding accuracy of samples (instantaneous values) fixed by gating units 3, 4, and the accuracy of their reproduction, and, consequently, the accuracy of measurements. Regulation of transmission coefficients in DC circuits and supply to the inputs of a null indicator 15 equal voltages. independent of the voltage levels at the inputs of the phase meter, makes it possible to almost completely eliminate the amplitude-phase measurement error.

Claims (1)

Claim A digital phase meter containing a gate pulse shaping unit, whose input through a frequency multiplier is connected to the first source of an input signal, a two-way signal, two gating units, the first inputs of which are connected to ₅ sources of input signals, and their second inputs are connected to the output of a gate forming unit, two analog-to-digital converters, the first outputs of which are connected with the control inputs of the gating pulse shaping unit, the second outputs are connected via serially connected operational storage units, digital-to-analogue converters and filters 15 inputs of a null indicator, the output of which is connected to the input of the phase shift measure, while the second inputs of the operational storage units are connected to the control outputs of the phase shift measure— 20 gov, also containing a digital indicator, the input of which is connected to the output of the phase shift measure, characterized in that, in order to improve the measurement accuracy, it has been entered 25 a reference voltage source, two comparators, two integrators, two controlled amplifiers and two detectors, the output of the reference voltage source being connected to the first inputs of the comparators, The output of each of the gating units is connected via a controlled amplifier to the input of an analog-digital converter, and the second input of each of the controlled amplifiers is connected via an integrator, a compressor, and a detector to the output of the filter.