SU1051702A1 - Method of calibrating linear scale of d/a converter - Google Patents

Abstract

METHOD FOR CALIBRATING THE LINEARITY OF A DIGITAL ANALOG BODY CONVERSION, consisting in a sequential measurement: the difference between discharge bits and weights of the calibrated and the reference digital-analogue converter, followed by processing the measurement results, different from, and with the aim of improving accuracy and slowness. measures are: the variability between the sum of the highest-order bit weights of the calibrated digital-analogue converter and the additional analogue measure and the difference between each of the top-eight bit-weights of the reference DIGIT of the analogue prefetura m and the sum of the one of the second digit of the digital-analogue preload, with this value of the calibrator's analog weights are converted by the formula, + V (. {+ f 1 1 + -1 Magnitude of the 3rd discharge cell (i N, .... N- (n + 1); the value of the additional analogue measure; the result measuring the difference of mehada with 1 bit the weights of the calibrated and opted digital-to-analog converter; the measurement result of the difference between the sum of all calibrated NttJx bit scales smaller than the 1st bit weight of the calibrated digital-analog converter and the i-th bit of the reference analog converter; the total number of digits;)). the number of highest calibrated bit balances.

Description

The design relates to electrical measuring equipment and can be applied when creating precision multi-bit digital angiography and analog-digital converters.

The known method is based on the sequential determination of the difference between one and the next discharge size and weight and all smaller bit weights, according to the result of which the magnitude of this bit weight is specified. Calibration is performed. starting with the youngest of calibrated bit scales 1,

However, this method is characterized by low calibration accuracy.

. The closest to the proposed technical essence is the method consisting in the sequential measurement of the difference between, all sizes 1 and the weights of the calibrated and reference ILP,. the results of which specify the radial weights of the calibrated DAC 2 J.

The disadvantage of this method is also low calibration accuracy, which is determined by the accuracy of the reference DAC and which cannot be higher than that of the latter, and low speed.

The purpose of the invention is to improve the accuracy and speed of calibration of the LPC,

The goal is achieved by the fact that in the method consisting in the sequential measurement of the difference between the discharge weights of the calibrated and the reference DAC with the subsequent processing of the measurement results, the difference between the sug. Second and highest analogue weights of the calibrated and additional analogue measure and the difference between the higher bits of the reference and the sum of all smaller bit weights of the value calibrated by this, the higher bit of the scales of the calibrated C / vn, are determined by the formula

(- 4V: -V -V1 + V2) And)

 2 1 1 1-4--1 1-f-l /

de Q. - i-ro bit size

 weights (d N, ..., N- (n + 1); o .. is the value of the additional

analogue measure; V. is the result of measuring the difference between the J-th bit weights of the reference and calibrated DAC; V is the result of measuring the difference between the sum of all calibrated discharge weights,

smaller j-ro bit weight of the calibrated digital-analogue converter and the ith bit weight of the reference digital-analogue converter, N is the number of bits of the calibrated DAC n - the number of senior calibrated

discharge weights.

 to explain the formula (1J, we consider two equalities

1 ° ° to;

V. rV –y2

. 1 + 1 i-H Uf -i

  r.l-v,

0 Qft, lb errors of determining the value of V /, - and V, -, respectively.

Subtracting from the first equality the second we get the ratio

A.- 2a. V, - V

where follows the validity of the formula (1). It is easy to prove that the error with L of determining the i-ro of the discharge weight is equal. ".

0 A..f / 5, (11, u;

. NfV Hl /

where /5.- tal, 1 (b (.

The last expression indicates that the error in calculating bit sizes does not accumulate.

5 The drawing shows the 6J7OK-cxe device ma implementing the proposed method.

The device contains a differential analog-to-digital converter (ASCh1) 1, a calibrated and reference digital-to-analog converters 2 and 3 (DAC), an analog adder 4, an additional analogue measure 5, an analog key 6 and a calculation unit 7,

Key 6 provides the input to the second input of the ADC 1 additional analogue measure 5 or the base potential of the device. Analog

 The adder 4 provides for feeding to the first input of the DAC 1 the difference of analog signals of the calibrated 2 and the reference 3 digital-analog converters. The measurement results are fed to the computational block-7, which provides the calculation of the values of the discharge weights.calibrated DAC 2.

The calibration process is as follows.

Calibrated n senior bits

0 weights of digital-analogue transform 2, with the lowest nz of calibrated bit scales doubled. The calibration procedure is applicable to any binary DAC (i.e.

5 In which the next discharge weight is greater than the previous one, twice) and for which the principle of superposition for discharge weights is fulfilled with the required accuracy. Since the output signal of a DAC can be of a different nature (current, voltage), then. The i-th bit weight is denoted by Qj. The reference DAC 3 generates additional analog signals B to reduce the difference between the signals fed to the inputs of the ADC. Calibration begins with measuring the difference V between the additional analogue measure Scr and the sum n of the highest bit weights of the calibrated DAC 2, the result of which subtracts the result of the drift zero measurement of the NH-f G-Cr YI Then, starting from the oldest , determine the values of all calibrated bit weights. The first to calibrate is the highest discharge weight of a. To determine it, it is necessary to measure the difference V | yj between it and the sum of all smaller calibrated bit N-1 owls. Since it is not possible to make sto directly possible, the difference is determined by the results of two measurements performed in the following way. The code to be calibrated DAC 2 is supplied with a code that includes only the highest bit weight: the output signal of the calibrated DAC 2 in this case is equal to a. The reference DAC also includes an N-th digit weight b (approximately equal to A. Signals and b | are subtracted in the analog adder 4 and fed to the first input of the ADC 1, to the second input of which the base potential of the device is applied. ADC 1 measures this difference and the result is memorized. Then, in the calibrated DAC 2, the highest bit weight is turned off and all smaller calibrated weights are turned on: the output signal of the calibrated DAC will now be equal to the sum of the y - to I ADC 1 measures the difference between The specified amount and output signal bj reference DAC 3 and the resulting resistor .4 i, the eduat V .. EV-bji, together with the three preceding ones, allows to calculate the true value of a, l. (Vi VN-v; i w2 J, v vj-vj) It is not difficult to notice that the inaccuracy of the additional analog signal b. does not affect the result of the calculation of the value, and, therefore, the value of ct is retained for the next calibration cycle, in which the value of the next (Nl) -ro discharge weight is determined. For this, it is necessary to determine the difference V ,, between the determined bit N - 1N-2 P o. weight, and the sum of i- ot. all smaller bit scales. Find it on the results of two measurements. in the calibrated and reference DACs 2 and 3 include (N-l) -bie bit-weights N-1 -N-1, respectively. The result of measuring the difference between them) and | jj - .b | jj is remembered. Then, in the calibrated DAC 2, the (M-1) -th discharge weight is turned off and all smaller calibrated discharge weights are included. The difference between H-2 is measured. the sum of the g-indicated weights and 2 a by the signal bc of the reference DAC. The result of V.J ZZ a -bf .. measuring I or this difference, together with the previous result V, of measurement and the result obtained in the previous calibration cycle, allows to calculate the value of the next bit weight a ... using the formula (j. y-, Next, determine the value of the next, (N-2) -ro bit weight, then the value o (j, etc.) And the value of the j-ro bit weight is determined after calculating the value of the previous ( i «-1) -r, o of the discharge weight and from the results of two measurements, the result Vl (X- - b of measurement of the difference between the i-th discharge weights of the calibrated and the supports of the 2. main DAC and the result of V i ° and LK rJ- tl measurements of the difference between the sum of all smaller calibrated weights of the calibrated DAC 2 and the i-th bit weight of the reference SCAN 3. The value of the i-th bit of the weights Q is determined by The f. , K Nn, as in this case, the ADC 1 measures

the difference between similar signals, and the inaccuracy of hj does not affect the result of calculating V and, consequently, the values of a, -.

The process of sequential determination of the values of the discharge weights continues until the last of the lowest calibrated, discharge weight a (.

The proposed method has the following advantages: it provides a higher accuracy of the calibration of the DAC, since there is a reduction in the effect of measurement errors made in previous calibration cycles (due to the presence of a 1/2 coefficient), and it also has great speed, since only the highest bit values are determined bottom weights.

Claims (1)

METHOD FOR CALIBRATING THE LINEARITY OF THE DIGITAL ANALOGUE CONVERTER, which consists in sequentially measuring the difference between the discharge weights of the calibrated and reference digital-to-analog converter with subsequent processing of the measurement results, with the exception of the fact that, in order to improve the accuracy and speed) * the difference between the sum η of the highest bit weights of the calibrated digital-to-analog converter and the additional analog measure and the difference between each of η old. · Of the total bit weights of the reference digital-to-analog converter and the sum of all the smaller bit weights of the calibrated digital-to-analog converter, while the values of the highest bit weights of the calibrated digital-to-analog converter are determined by the formula where a · is the value of the i-th bit weight (i = N, ..., M- (n + 1); “Amount of additional analogue measure; Vf is the result of measuring the difference between the ith bit weights of the calibrated and reference digital-to-analog converter; V. - the result of measuring the difference between the sum of all calibrated bit weights less than the 1st bit weight of the calibrated digital-to-analog converter and the 1st bit weight of the reference digital-to-analog converter; N is the total number of bits of the calibrated DAC; η is the number of senior calibrated • discharge weights.