EP0465476A4

EP0465476A4 - A sampling circuit

Info

Publication number: EP0465476A4
Application number: EP19900903581
Authority: EP
Inventors: Evan John Stanbury
Original assignee: Alcatel Australia Ltd
Current assignee: Nokia Services Ltd
Priority date: 1989-04-04
Filing date: 1990-02-22
Publication date: 1992-07-08
Also published as: AU5157490A; EP0465476A1; WO1990012325A1

Abstract

A sampling circuit, particularly for sampling voltage and current amplitudes in an AC kWh meter, in which signals from transducers (1 and 2) representing the voltage and current amplitues respectively are selectively applied to an analogue-to-digital converter (4) by an analogue multiplexer (3) under the control of a processor (5) which varies the sequence in which the signals are applied to the converter. The processor performs calculations on values measured by the converter to derive the kWh.

Description

A Sampling Circuit Technical Field

This Invention relates to techniques and equipment for sampling two or more signals and will be described in the context of sampling voltage and current amplitudes in an AC kWh meter. Background Art

In electronic electricity meters, current and voltage are sampled and converted to digital signals for further processing. At present the sampl¬ ing is done with a pair of saπple/hold (S/H) aiηplifiers or track/hold cir¬ cuits which sample current and voltage at the same time. These samples are then fed to a single analog-to-digital (A/D) converter via a multiplexer, this being cheaper than the use of a pair of A/D converters.

The S/H amplifiers or track/hold circuits thus ensure a fairly con¬ stant input to the A/D converter while the conversion takes place, other¬ wise a random phase error is Introduced in the measurement due to the measurement being taken at an indeterminate time in the measurement period.

However, accurate S/H amplifiers are expensive, power hungry, and can Induce digital noise into analog circuitry. They suffer from output droop between the time the sample is taken and the time the signal is measured, and require expensive capacitors to sample accurately. Therefore, they are difficult to Integrate in large scale ICs. One S/H amplifier is required for each input signal, which may require 6 to 12 for a three-phase elec¬ tricity meter.

These problems can be largely nullified and a cheaper circuit obtained by the techniques of this invention. Summary of Invention

This specification discloses a technique for sampling two or more signals without the use of a S/H aπplifier by measuring the signals sequen¬ tially. The random phase error introduced by this procedure is cancelled when averaged over a large number of samples by reversing the order of suc¬ cessive samples.

The technique produces a residual amplitude error related to the sine of the phase angle between the samples.

This residual error can be eliminated by the standard calibration pro¬ cedure used to eliminate gain errors due to component variation. Brief Description of Drawings

The inrøition will be more fully described with reference to the ac- ccxπpanying drawings in which:

Fig. 1 shows a block diagram of a single-phase Ac k h meter embodying the invention, and

Fig. 2 shows a- polyphase embodiment. Best Mode of Carrying Out the Invention

With reference to the embodiment shown in Fig. 1, quantities propor¬ tional to the current and voltage used by load 6 are produced by transducers 1 and 2 respectively. These signals may be selected by analog multiplexer 3 under control of processing means 5 (which may in turn be controlled by software). The signal selected by 3 is converted to digital format by A/D converter 4, which is started by processing means 5 at inter¬ vals dictated by timing means 7«

The processing means 5 first selects the desired analog input and then starts A/D converter 4. On coπpletion of the conversion, the value meas¬ ured by 4 is read by processing means 5 which may then initiate further conversions by controlling multiplexer 3 and A/D converter 4. Processor 5 performs calculations on the values measured by 4 to derive useful quanti¬ ties (such as kWh, etc.) from the measured quantities by known means. These derived quantities may then be transmitted to other systems for dis¬ play, recording, billing, etc.

Since the meter does not contain Sample/Hold amplifiers (S/H) to meas¬ ure the transducer outputs as a simultaneous pair, the processing means 5 must sequentially read the input signals, introducing a phase error into the measurements. However, processing means 5 may cancel this phase error by taking half of the samples with the voltage followed by the current, and the other half by sampling first the current, then the voltage. In a pre¬ ferred embodiment, the order is reversed on successive samples.

The calculations performed by processing means 5 typically include a factory-settable calibration constant to account for component variations. This invention utilises the same calibration means to correct or the ratio error introduced by non-simultaneous sampling of current and voltage. In a preferred embodiment the calibration constant may be entered via a serial calibration port 8.

As an example a successive-approximation A/D converter measuring low- frequency (50 or 60Hz) signals takes 150us to measure a voltage transducer, with a further 50us delay before starting measurement of the current transducer. This results in a phase error of 3.6° at 50Hz, which would produce a power measurement error of 11 per cent at a phase angle of 60° (and greater errors at larger phase angles or higher frequencies). Math¬ ematically cos(60+3.6°)/cos(60) = 0.89 = 11- low. This error is unaccepta¬ ble for coπmercial power measurement. However, by employing the method described In this Invention, a phase error In a single direction is re¬ placed by a phase error in alternating directions, which sometimes overes¬ timates the power by 11.1 per cent and sometimes underestimates by 10.7 per cent. Mathematically cos(6θ-3«6°)/cos(60) = 1.111 •= +11 . On average the calculated power will be low by 0.2 per cent at all phase angles. Residual error = cos(60-3.6°) + cos(60+3.6°)/cos(60) = 0.998 = -0.2%. When the me¬ ter is calibrated to cancel variation in component values, this 0.2 per cent gain error is also cancelled.

In a further embodiment, known phase errors in the transducers (due to external current transformers, for example) may be corrected by altering the proportion of samples taken in each order from an exact 50%. In a further e___3θdj_ment, this proportion may change based on the cur¬ rent being measured, to correct phase errors which are worse at low cur¬ rent, for example.

Fig. 2 shows a polyphase application of the invention. In this case, a multiplicity of current and voltage transducers labc and 2abσ (One pair for each phase) are sequentially saπpled using miltiplexer 3» As described for a single-phase meter, the order of sampling current and voltage in each phase may be alternated to correct for phase errors in sampling.

Such an embodiment may be used for a polyphase industrial meter capa¬ ble of calculating further parameters such as V, I, VAR, VA, harmonic power and phase angle. Sets of measurements may be taken over several cycles with alternating order on successive sets and the necessary calculations are performed on the averaged readings. Although the invention has been described in relation to AC power measurements, it can also be used in other embodiments such as DC power measurements and AC phase meters.

Claims

AMENDED CLAIMS

[received by the International Bureau on 20 July 1990 (20.07.90); original claims 1, 2 and 6 amended ; other claims unchanged (1 page)]

1. A sampling circuit simulating the sampling of one or more pairs of signals siπultaneously, comprising a multiplexer having two or more inputs to which respective ones of the signals are applied, the output of the πultiplexer being connected to an analog-to-digital converter, and control means to cause the multiplexer to connect the pairs of inputs to the output rapidly in sequence, and to alternate the sequence in which the members of each pair of inputs are connected to the outμits for each successive sample of the pair.

2. A sampling circuit as claimed in claim 1, including processing means connected to the output of ^"the converter to calculate the product of the two signals, and to accumulate the products from a plurality of calculated values.

3. A saπpling circuit as claimed in claims 1 or 2 wherein errors caused by the multiplexing sequence are cancelled by calibration.

4. A kWh meter including a sampling circuit as claimed in any one of claims 1 to 3» the saπpling circuit having first and second inputs to which signals representative of voltage and current respectively are applied.

5. A polyphase meter including a sampling circuit as claimed in any one of claims 1 to 3«

6. A method of saπpling one or more pairs of analogue signals, comprising applying each signal of each pair in sequence to a single analog-to-digital converter, and alternating the sequence in which the members of each pair are applied to the analog-to- lgital converter, multiplying a pair of meas- iirements of each signal from the output of the converter and summing a plu¬ rality of measurements of each pair to derive values representing the product of the signals.

7. A method as claimed in claim 6 including the step of cancelling the amplitude errors due to the method of saπpling.

8. A saπpling circuit employing the method as claimed in claim 6 or 7. STATEMENTUNDERARTICLE19

New Claims 1 and 2 incorporate amendments to clearly distinguish the device claimed from prior art disclosed in documents cited in the International Search Report.

New Claim 6 incorporates amendments to clearly distinguish the method claimed from prior art disclosed in the said prior art.