SU885947A1 - Device for regulating digitizing level - Google Patents

Description

(54) DEVICE FOR REGULATING THE QUANTUM LEVEL

I

The invention relates to radio engineering and can be used in digital systems when detecting impulse signals against a background of non-stationary noise.

A quantizer control device is known, comprising a synchronizer and a series-connected first comparison unit, a frequency divider, a reversible counter, and a memory block whose output is connected to the first inputs of the first and second, comparison blocks and the installation input of a reversible counter connected by its second input to the inverse output of the second block comparison 1.

However, the known device has an inaccurately accurate quantization level setting.

The purpose of the invention is to improve accuracy.

The goal is achieved by the fact that a quantizing level control device comprising a synchronizer and a serially connected first comparison unit, a frequency divider, a reversible counter and a memory unit, the output of which is connected to the first inputs of the first and second comparison blocks and the setup input

reversible counter, connected by its second input to the inverse output of the comparison unit, introduced an adjustable voltage source, a switch and the first and second analog-to-digital converters, the first inputs of which are connected between 5 to the output of the switch, the output of each analog-digital converter is connected to the second the input of the same unit of comparison, the reference input of the second analog-to-digital converter is connected to the output of an adjustable voltage source, and the corresponding outputs of the synchronizer are connected to the control inputs of the switch, the first and second analog-to-digital converters, the first and second comparison blocks, and the memory block.

15

The drawing shows a structural electrical circuit of the proposed device.

The device contains a switch 1, two analog-digital converters (ADC) 2 and 3, two blocks 4 and 5 of the comparison, block 6

20 memory, reversible counter 7, frequency divider 8, adjustable voltage source 9, synchronizer 10.

The device works as follows.

Analog-to-digital converters 2 and 3 convert the input voltages of each channel, combined to the inputs of ADC 2 and 3 using a switch 1. These codes are fed to the first inputs of blocks 4 and 5 of the code comparison, respectively. From memory block 6, the code corresponding to the value of the input voltage level in this channel during its previous connection is fed to the inputs of blocks 4 and 5 of the code comparison as well as to the installation inputs of the reversible counter 7. In block 5, the code values of the same channel are compared for the given and previous connection. The result of the comparison is a standard amplitude pulse, which, arriving at the addition or subtraction input of the reversible counter 7 and the input of the frequency divider 8, changes the state of the reversible counter 7 by one in the lower position. In block 4, the codes received from memory block 6 and output from analog-digital converter 2 are compared, and the scale of the input voltage converter to ADC code 2 is determined by the value of the reference voltage set by adjustable source 9. At output 4 of the pulse only if the input voltage of the device exceeds the average value of the noise emission voltage multiplied by the specified number determined by the scaling factor.

After the unit has been written or subtracted in the reversible counter 7, a new place is recorded in the cell of the memory block 6 corresponding to the channel. The synchronizer 10 controls the operation of the device. When the next channel is connected to the inputs of the ADC 2 and 3, the operation cycle is repeated.

The proposed device differs from the known one in that it allows to provide higher accuracy / setting of the quantization threshold in conditions of non-stationary input voltage, and changing

The quantization threshold is performed smoothly by smoothly changing the reference voltage, which can be achieved, for example, with a potentiometer. While In a known device, the quantization threshold is changed discretely. In this case, the step of discreteness is determined by the conversion factor of the recalculation scheme. For example, at a conversion factor of 32 (recalculation scheme contains 5 bits), all input voltages in

this case is divided into 32 discrete.

Claims (1)

Invention Formula A quantization level control device comprising a synchronizer and a serially connected first comparison unit, a frequency divider, a reversible counter and a memory block, the output of which is connected to the first inputs of the first and second Comparison units and the installation input of a reversible counter, connected by its second input to the inverse output of the second unit, characterized in that, in order to improve the accuracy, adjustable voltage supply, switch and first and second analog-to-digital converters, the first inputs of which are connected to each other and to the output of the switch, the output of each analog-to-digital converter is connected to the second input single comparison unit, the reference input of the second analog-digital conversion. The receiver is connected to the output of an adjustable voltage source, and the corresponding outputs of the synchronizer are connected to the control inputs of the switch, the first and second analog-to-digital converters, the first and second comparison blocks, and the memory block. Sources of information taken into account in the examination I. USSR author's certificate No. 599241, cl. H 04 B 1/10, 1978 (prototype). -0 .BUT eight / P l g4d