JPS58167971A - Digital type maximum/minimum detection circuit - Google Patents

Abstract

PURPOSE:To enable accurate detection of the maximum value and the minimum value by inputting a D/A conversion output of an A/D conversion data and an input signal into an A/D converter through a differentiation amplifier to compute the current value from the conversion output thereof. CONSTITUTION:Initially, a control computation circuit 26 controls switching circuits 21 and 24 to input an input signal direct into an A/D converter 22, an output of which is memorized. Then, the control computation circuit 26 inputs an input signal and an output of a high-resolution D/A converter 25 into a differentiation amplifier 23 and an output with the difference amplified by 2<8> times inputted into an A/D converter 22. Then, the control computation circuit 26 reads the current data to compute the current value using a memory data and compares data from the results of the computation with the previous maximum data. When it is larger than the data, the maximum data is updated by data from the results of the computation and held while a signal is outputted to an alarm 27. This enables an accurate detection of the maximum and minimum values even with a low-resolution A/D converter.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention is used in various fields of needle side, and is a maximum and Minimum detection 1 path *l 41
The present invention relates to a digital maximum/minimum detection circuit that converts an analog signal into a digital signal and processes it as a digital value.

[Technical background of the invention]

This type of conventional maximum/minimum detection circuit is jl! IIg as shown in Figure 1. That is, 11 is an analog signal input tm/D (analog/digital) conversion tm/
It is a D converter, and its digital data output is in register J.
JK is guided and becomes one of the input cams of comparator J3. The data of the register 12 is derived as the other input amount of the comparator 13, and when it is determined that the input 1 of the comparator 11 is input 1, a comparison output /f pulse is generated and becomes one input of the AND f-) 74. do. As the other input of this ANDr-) 11, the mu/D converter 11
A K IDC pulse is derived every time the M/D conversion operation is completed, and when there is both an arm input and an arm input, an arm output Crt is generated. Said register 1
2 stores the digital data from the M/D converter 11 as update data when the pulse output CP from the ANDR 14 is input, and the alarm device 15 issues an alarm every time the data in the register J2 is updated. is starting to occur.

Therefore, in the above maximum-minimum detection circuit, when the analog signal input level becomes higher than the past maximum value, the comparator IJI determines that the input cam>input 1, and the data stored in the register 12 (the past maximum value) is determined. is updated to the 5p digital data from the M/D converter 11 at this time, and the alarm device 16 issues an alarm. Note that if the judgment condition of comparator IJ is input input B, then the digital data of the minimum value of the analog signal input is input to register JJ.
K will be stored.

That is, according to the maximum/minimum detection circuit described above, it is possible to quickly detect a slight variation in the maximum value or minimum value of an analog signal that monotonically increases or decreases, and generates an alarm.

[Problems with background technology]

By the way, the digital data output from the M/D converter 11 is rounded and contains errors, making it impossible to accurately detect the maximum or minimum value of the analog signal input. Here, the error of the MU/D converter 11 will be considered. The error included in the mu/D conversion output is based on the analog reference value 1, which is the standard for measuring the analog input amount in the mu/D converter 1.
This can be considered to be due to an error of 1.

In other words, if the digital value of the MU/Dt conversion output includes a nonlinear error of ±-L8B (minimum weight pit) in addition to the quantization error, the MU/D conversion characteristics shown in Figure 2 on the analog axis The analog human cam, which should be a fixed value (absolute value), appears to vary between points A and B. This means that the analog reference voltage includes an error, and the reference voltage A that includes this error
□, this is because the true value tone is measured as the overall standard. For example, if the error of the analog reference voltage with respect to the digital output value is zero, and if the error of the 9/D converter 11 excluding the quantization error tube is zero, then the value of the analog reference voltage [M□, then M1lFj'' A + b ... (1). On the other hand, the analog reference voltage t A11y2 (
y) and Sekem □, 2= A, , + a... (2). Therefore, the error zsum is given by equations (1) and (2). -mmmmt21-1b a
t・ta).

The relationship between equations (1″), (2), and (3) described above is illustrated in Figure 3. From this figure, it can be seen that the digital It can be seen that the converted values are different.In other words, when the error in the reference voltage is zero, the digital value for the analog input A11k is N-2 (N is an integer), but if the error in the reference voltage is 4 m 1 m. At some point, the digital value becomes N-1 for the analog human cam i.

[Purpose of the invention]

The present invention has been made in view of the above circumstances, and provides a digital maximum/minimum detection circuit that can accurately detect the maximum or minimum value of an analog signal input.

[Summary of the invention] That is, the digital maximum/minimum detection i-path of the present invention is
The first input to the D/D converter is the analog value input, and the second input is the output of the differential amplifier. Then, at the first input to the Mu/D converter, the Omu/D conversion output data N tubes are stored, and this data The output of this D/MU converter and the analog signal input at this time are led to the differential amplifier. Then, the digital value of the analog signal input is determined by a predetermined calculation of the Mu/D conversion output data M at the second input of the Mu/D converter and the front desk memory data N, and this digital value is the maximum value in the past. The maximum value or minimum value is updated and held by comparing it with the stored data of the value or minimum value.

Therefore, by finding the difference between the highly accurate feedback signal from the D/M converter and the analog signal input, it is possible to bring the error of the analog reference voltage in the M/D converter as close to 9 zero as possible, and to reduce the error of the analog signal input. A digital value close to the true value is obtained, and maximum/minimum detection can be performed accurately.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. In FIG. 4, 20 is an input terminal to which an analog signal input is led, and 21 is a first terminal for leading the analog signal input to the input terminal of the A/D converter 22 or one input terminal (g) of the differential amplifier 23. 24 is a switching circuit 2 for guiding the output of the D/mu converter 25 to the other input terminal of the differential amplifier 23, and the output of the differential amplifier 23 is connected to the mu /D converter 220 input terminal. Reference numeral 26 denotes a control calculation circuit to which the output of the M/D converter 22 is input, which provides a predetermined switching control signal to the switching circuits 21 and 24 of ii1 and $I2), storage and calculation of input values. , comparative judgment, holding of the maximum value or minimum value, providing a high-resolution digital input to the D/MU converter 25, and providing an alarm signal to the alarm device 27.

Note that the MU/D converter 22 has h bits, for example, 8 bits output, 69, analog reference voltage A, cuff t, for example 5.12V, and nonlinearity difference (absolute wA difference) even if d±.
-Lill C), therefore, the maximum value wax of the error Δm i1 of the analog reference voltage is 111 ΔA = jb-ml nmx from the dynamic equation (3). Further, the D/Dl converter 25 is configured to include the A/Dl
The resolution is higher than that of converter 22, for example, 16 resolution.

Next, the operation of FIG. 4 with the above configuration will be explained.

Initially, the control calculation circuit 25 inputs the analog signal input directly to the MU/D converter 22 and prevents the output of the D/MU converter 25 from inputting to the differential amplifier 23. , xa, and stores the output of the MU/D converter 22 (its digital value is assumed to be N).

In this case, the error Δm1n of the analog reference voltage in the M/D converter 22 is 40 mV as shown in dynamic equation (4). Next, the control calculation circuit 26 inputs the analog signal to the differential amplifier 21, and inputs the output signal of the D/MU converter 25 to the differential amplifier JJK. j1
The switching circuit 21.240 operates as described above and generates 16-bit digital data by setting the stored data (digital value N) t - the upper 8 bits and adding "0" to the lower 8 bits. and outputs it to the D/mu converter 25.

At this time, in the differential amplification@23, the D/mu converter 2M
(D difference between high-precision analog signal output and analog signal input of signal input terminal 20 (A/D converter 2 J 11)
) in the range equivalent to L8B), and calculate this difference by 12
Amplify twice. Therefore, the output of the MU/D converter 22 obtained at this time (its digital value is assumed to be excellent) Fi, A
/D converter 220 reference voltage error "inmi engineering Yr16
It is determined by bit resolution. Then, the control arithmetic circuit 26 reads the input data at this time and performs the arithmetic operation of N×28+R (5) using the aforementioned storage data tube. The digital value that is the result of this calculation is the error Δm of the analog reference voltage in (4), n18, and is highly accurate.

Furthermore, the control arithmetic circuit 26 controls to repeatedly perform the above-mentioned MU/D conversion operation twice, and
) every time the calculation (NX2''+M) is completed, the calculation result data is updated and held from the past maximum value data (already detected and held) and an alarm signal 10 is generated.
Output to information@11. As a result, an alarm is generated every time the maximum value is updated.

According to the maximum/minimum detection circuit as described above, since the difference between the analog signal input and the analog signal input is calculated by performing It is possible to obtain a denotal value corresponding to the analog signal input that is close to the true value of the reference voltage. therefore,
Even if a low-cost mu/D converter 22 with low resolution is used, the maximum value or minimum value can be detected accurately.

Note that the alarm device j1 is omitted when there is no need to generate an alarm.

〔Effect of the invention〕

As mentioned above, the digital type strict minimum detection circuit of the present invention can accurately detect the maximum value or minimum value of analog signal input, and is suitable for use in various needle side fields. be.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing a conventional maximum/minimum detection circuit.
2 and 3 are characteristic diagrams shown to explain the operation of the A/D converter shown in Figure 1, and FIG. 4 is a block diagram showing an embodiment of the digital maximum/minimum detection circuit according to the present invention. It is. ! J,! 4...Switching circuit, 22...Mu/Dt! 1
1! 23...Differential amplifier, 25...D/MU converter, 26...Control calculation circuit.

Claims (1)

[Claims] A 1-bit M/D converter, a D/M converter having a higher resolution than the M/D converter, a switching control means for switching and controlling the input signal to the M/DtII converter, and a switching control means for controlling the input signal to the M/DtII converter; A storage means for storing the output data N of M/D conversion when the analog signal input is inputted to the D/D converter for the 111th time; a differential amplifier that takes the difference between the analog signal output and the analog signal input of the D/MU converter and amplifies it by a predetermined time; RK Yo Shimai Mu/D Envy Exchanger 2
(
xxz! Compare the ratio calculation result obtained by this means with the data held for the past maximum value or minimum value of the analog signal input, and determine whether the newly obtained calculation result is better. A digital maximum/minimum detection circuit characterized in that it is equipped with comparison judgment holding means and tA for updating and holding data of the past maximum value or minimum value based on the calculation result when the value is large or small.