JPS6029027A - Signal converting circuit - Google Patents
Signal converting circuitInfo
- Publication number
- JPS6029027A JPS6029027A JP13313783A JP13313783A JPS6029027A JP S6029027 A JPS6029027 A JP S6029027A JP 13313783 A JP13313783 A JP 13313783A JP 13313783 A JP13313783 A JP 13313783A JP S6029027 A JPS6029027 A JP S6029027A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- pcm
- bit
- digital signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
Abstract
Description
【発明の詳細な説明】
本発明は、アナログ信号を多進符号のデジタル信号に変
換する信号変換回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal conversion circuit that converts an analog signal into a multi-code digital signal.
アナログの入力信号をデジタル化して記録媒体により記
録再生を行なうデジタル記録再生においては、アナログ
信号を3進法以上の所謂多進符号のデジタル信号に変換
して記録媒体に記録すれば、占有周波数の狭帯域化、或
いは記録密度の向上環の利点がある。しかし、標本化さ
れた入力信号を多進符号に符号化する回路は従来、その
回路構成が複雑になるという欠点があり、一般にはPC
M信号等の2進法による°1″か°°0″かのパルス信
号が用いられてきた。In digital recording and playback, in which an analog input signal is digitized and recorded and played back on a recording medium, if the analog signal is converted into a digital signal in ternary or higher so-called multi-ary code and recorded on the recording medium, the occupied frequency can be reduced. This has the advantage of narrowing the band or improving recording density. However, circuits that encode sampled input signals into multi-ary codes have conventionally had the disadvantage of complex circuit configurations, and are generally
A binary pulse signal of °1" or °0", such as an M signal, has been used.
本発明はかかる従来の欠点を取り除き、周知のパルス符
号変調回路に簡単な付加回路を設けることによりアナロ
グ信号を多進符号のデジタル信号に変換する信号変換回
路を提供するものであり、以下その実施例を図面をもっ
て説明する。The present invention eliminates such conventional drawbacks and provides a signal conversion circuit that converts an analog signal into a multi-code digital signal by providing a simple additional circuit to a well-known pulse code modulation circuit. An example will be explained using drawings.
第1図は本発明回路を適用した磁気記録再生装置の記録
系のブロック図であり、第1の入力端子1、に入力され
たアナログ信号S。は標本化回路2に入力される。標本
化回路2はアナログ信号S。を所要のナイキスト間隔T
、毎に標本化することによりPAM信号S、とした後、
符号化回路3に出力する。FIG. 1 is a block diagram of a recording system of a magnetic recording/reproducing apparatus to which the circuit of the present invention is applied, in which an analog signal S is input to a first input terminal 1. is input to the sampling circuit 2. The sampling circuit 2 receives an analog signal S. is the required Nyquist interval T
, by sampling each time to obtain a PAM signal S,
It is output to the encoding circuit 3.
符号化回路3はこのPAM信号S1をmビットのPCM
信号S2に変換し、D−A変換器5に出力する。The encoding circuit 3 converts this PAM signal S1 into m-bit PCM
It is converted into a signal S2 and output to the DA converter 5.
ここで、標本化回路2と符号化回路3は周知のパルス符
合変調回路4を構成する。Here, the sampling circuit 2 and the encoding circuit 3 constitute a well-known pulse code modulation circuit 4.
PCM信号S2はD=A変換器5によりnヒノト毎にD
−A変換さたて2n段階の振幅レベルを有するデジタル
信号S、に変換され、所要の変調回路(図示せず)を介
して磁気ヘッド6に出力されることにより磁気テープ8
に記録される。The PCM signal S2 is converted to D every n times by the D=A converter 5.
-A conversion is converted into a digital signal S having an amplitude level of 2n steps, and is output to the magnetic head 6 via a required modulation circuit (not shown), so that the magnetic tape 8
recorded in
第2の入力端子12に入力されるクロックパルスcpの
周波数f。は第1のカウンタ7、により分周されて標本
化周波数f、とされることにより標本化回路2の標本化
タイミンクを制御すると共に、符号化回路3に入力され
ることによりmビットで構成される1フレームの時間長
であるナイキスト間隔男(T、=1/fl)を制御する
。またクロックパルスcpは第2のカウンタ72により
分周されて周波数f2(f、、 = m f、 )とさ
れ符号化回路3に入力されることにより、符号化回路3
から出力されるPCM信号S2のピノ1−間隔T2 (
T2 =l/ f2)を制御する。Frequency f of the clock pulse cp input to the second input terminal 12. is divided by the first counter 7 to obtain the sampling frequency f, thereby controlling the sampling timing of the sampling circuit 2, and is input to the encoding circuit 3 to be composed of m bits. The Nyquist interval (T, = 1/fl), which is the time length of one frame, is controlled. Further, the clock pulse cp is frequency-divided by the second counter 72 to have a frequency f2 (f, , = m f, ), and is input to the encoding circuit 3.
Pino 1-interval T2 of PCM signal S2 output from
T2 = l/f2).
さらにクロックパルスCpは第3のカウンタ73により
分周されて周波数fs (f3= f2/n )とされ
ることによりD−A変換器5はビア)間隔がT3(T3
−1/f3)である多進符号のデジタル信号S3を出力
すべく、PCM信号S2をnビット毎D−A変換させる
。Further, the clock pulse Cp is divided by the third counter 73 to have a frequency fs (f3=f2/n), so that the DA converter 5 has a via interval of T3 (T3
-1/f3), the PCM signal S2 is DA-converted every n bits to output a digital signal S3 of a multi-ary code.
第2図はm = 4、n−2とした場合の各部の出力波
形を示し、(a)は入力端子11に入力されるアナログ
信号S。を、(b)は標本化回路2から出力されるPA
、M信号S、を、(C)は符号化回路3から出力される
4ビツトのPCM信号S2を、(d)はD−A変換器5
から出力される2層階の振幅レベルを有するデジタル信
号S3を夫々示す。FIG. 2 shows the output waveforms of each part when m = 4 and n-2, and (a) shows the analog signal S input to the input terminal 11. , (b) is the PA output from the sampling circuit 2
, M signal S, (C) is the 4-bit PCM signal S2 output from the encoding circuit 3, and (d) is the DA converter 5.
The digital signals S3 having two levels of amplitude levels outputted from the respective circuits are shown.
以上の本発明回路では、特にPCM信号を多進符号に変
換する回路がD−A変換器で構成されるため、記録再生
装置に用いた場合、アナログ信号をデジタル信号に変換
する記録系において、PCM信号を入力して22段階の
振幅レベルを有するデジタル信号を出力するD−A変換
器を、再生系においてPCM信号をアナログ信号に変換
するD−A変換器により代用することが可能となるため
、回路構成が簡単であると共に、占有周波数帯域が狭い
多進符号化回路を提供できる。In the above-described circuit of the present invention, the circuit that converts the PCM signal into a multi-ary code is composed of a D-A converter, so when used in a recording/reproducing device, in a recording system that converts an analog signal into a digital signal, This makes it possible to replace the D-A converter that inputs a PCM signal and outputs a digital signal with 22 amplitude levels with a D-A converter that converts the PCM signal into an analog signal in the reproduction system. , it is possible to provide a multi-aryl encoding circuit with a simple circuit configuration and a narrow occupied frequency band.
また、デジタル信号S3をバッファメモリ(図示せず)
に入力することにより、時間軸において圧縮し、記録密
度を向上させることができる。このときの22段階の振
幅レベルを有するデジタル信号を第2図(e)に示す。In addition, the digital signal S3 is stored in a buffer memory (not shown).
By inputting data into the data, it is possible to compress the data on the time axis and improve the recording density. A digital signal having 22 amplitude levels at this time is shown in FIG. 2(e).
なお、本発明回路においてはmビットのPCM信号をn
ビット毎に1)−A変換する際、m/ nは2≦m /
n < mの条件を満たす整数であれば良いことから
、上述の実施例に限定されることなく、例えば15ビッ
トのPCM信号を3ピント毎にD−A変換することによ
り、アナログ信号を5ビツトで、かつ各パルスの振幅レ
ベルが23段階のデジタル信号に変換して記録すること
も可能であると共に、磁気記録媒体に限定されることな
く、複数の振幅レベルに対応する信号を記録できる媒体
であれば、本発明を適用できることは勿論である。Note that in the circuit of the present invention, the m-bit PCM signal is
When performing 1)-A conversion for each bit, m/n is 2≦m/
Since any integer that satisfies the condition n < m is sufficient, the present invention is not limited to the above-mentioned embodiments, and, for example, by D-A converting a 15-bit PCM signal every 3 pins, an analog signal can be converted into 5-bit data. It is also possible to convert and record the amplitude level of each pulse into a digital signal with 23 levels, and it is not limited to magnetic recording media, but is a medium that can record signals corresponding to multiple amplitude levels. Of course, if there is, the present invention can be applied.
第1図は本発明の一実施例のプロyり図を、第2図は本
発明の説明に供する波形図を夫々示す。
2・・・標本化回路、3・・・符号化回路、4・・パル
ス符合変調回路、5・・・D−A変換器、77.72.
73 ・・・カウンタ。
第2図FIG. 1 is a schematic diagram of an embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining the present invention. 2... Sampling circuit, 3... Encoding circuit, 4... Pulse code modulation circuit, 5... D-A converter, 77.72.
73...Counter. Figure 2
Claims (2)
パルス符号変調回路と、該PCM信号をnピッ1−毎に
D−A変換し、m/nビットのデジタル信号を出力する
D−A変換器とを備えたことを特徴とする信号変換回路
。(1) A pulse code modulation circuit that modulates an analog signal into an m-bit PCM signal, and a DA converter that performs D-A conversion on the PCM signal every n bits and outputs an m/n-bit digital signal. A signal conversion circuit characterized by comprising:
数であることを特徴とする特許請求の範囲第1項記載の
信号変換回路。(2) The signal conversion circuit according to claim 1, wherein the m/n is an integer satisfying a condition of 2≦m/n (m).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13313783A JPS6029027A (en) | 1983-07-21 | 1983-07-21 | Signal converting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13313783A JPS6029027A (en) | 1983-07-21 | 1983-07-21 | Signal converting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6029027A true JPS6029027A (en) | 1985-02-14 |
Family
ID=15097625
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13313783A Pending JPS6029027A (en) | 1983-07-21 | 1983-07-21 | Signal converting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6029027A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9884354B2 (en) | 2011-12-26 | 2018-02-06 | Neviot-Nature of Galilee Ltd. | Water dispenser with a cleaning mechanism |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54120515A (en) * | 1978-03-10 | 1979-09-19 | Toshiba Corp | Coding system |
JPS5619227A (en) * | 1979-07-25 | 1981-02-23 | Hitachi Ltd | A/d converter |
-
1983
- 1983-07-21 JP JP13313783A patent/JPS6029027A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54120515A (en) * | 1978-03-10 | 1979-09-19 | Toshiba Corp | Coding system |
JPS5619227A (en) * | 1979-07-25 | 1981-02-23 | Hitachi Ltd | A/d converter |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9884354B2 (en) | 2011-12-26 | 2018-02-06 | Neviot-Nature of Galilee Ltd. | Water dispenser with a cleaning mechanism |
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