JPS5618434A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5618434A
JPS5618434A JP9393979A JP9393979A JPS5618434A JP S5618434 A JPS5618434 A JP S5618434A JP 9393979 A JP9393979 A JP 9393979A JP 9393979 A JP9393979 A JP 9393979A JP S5618434 A JPS5618434 A JP S5618434A
Authority
JP
Japan
Prior art keywords
solder layer
grains
semiconductor device
metals
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9393979A
Other languages
Japanese (ja)
Inventor
Takashi Suga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP9393979A priority Critical patent/JPS5618434A/en
Publication of JPS5618434A publication Critical patent/JPS5618434A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/29076—Plural core members being mutually engaged together, e.g. through inserts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To make hard the generation of thermal fatigue in the semiconductor device integrated with a semiconductor substrate and electrode metals or cooling metals, etc., putting a solder layer between them by a method wherein grains or a mesh material is interposed in a layer of the solder layer. CONSTITUTION:In the middle of a solder layer of the semiconductor device consisting of electrode metals and cooling metals adhered to a semiconductor substrate putting the solder layer between them, the mesh plate 12', etc., is interposed to equalize the thickness of the solder layer. By this way, the thermal fatigue phenomenon to break off the solder caused by using repeatedly many times can be prevented. The same effect can be obtained by mixing the solder layer with metal grains or insulator grains having a superior thermal conductivity instead of the mesh metal plate.
JP9393979A 1979-07-24 1979-07-24 Semiconductor device Pending JPS5618434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9393979A JPS5618434A (en) 1979-07-24 1979-07-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9393979A JPS5618434A (en) 1979-07-24 1979-07-24 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5618434A true JPS5618434A (en) 1981-02-21

Family

ID=14096394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9393979A Pending JPS5618434A (en) 1979-07-24 1979-07-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5618434A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2620569A1 (en) * 1987-09-11 1989-03-17 Radiotechnique Compelec Process for gauging the thickness of a weld of an electronic component on a substrate
US5089439A (en) * 1990-02-02 1992-02-18 Hughes Aircraft Company Process for attaching large area silicon-backed chips to gold-coated surfaces
US20180375297A1 (en) * 2015-01-27 2018-12-27 Parviz Tayebati Solder-creep management in high-power laser devices

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011770A (en) * 1973-06-04 1975-02-06
JPS5068057A (en) * 1973-10-17 1975-06-07
JPS5359366A (en) * 1976-11-09 1978-05-29 Mitsubishi Electric Corp Semiconductor unit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011770A (en) * 1973-06-04 1975-02-06
JPS5068057A (en) * 1973-10-17 1975-06-07
JPS5359366A (en) * 1976-11-09 1978-05-29 Mitsubishi Electric Corp Semiconductor unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2620569A1 (en) * 1987-09-11 1989-03-17 Radiotechnique Compelec Process for gauging the thickness of a weld of an electronic component on a substrate
US5089439A (en) * 1990-02-02 1992-02-18 Hughes Aircraft Company Process for attaching large area silicon-backed chips to gold-coated surfaces
US20180375297A1 (en) * 2015-01-27 2018-12-27 Parviz Tayebati Solder-creep management in high-power laser devices
US11196234B2 (en) * 2015-01-27 2021-12-07 TeraDiode, Inc. Solder-creep management in high-power laser devices

Similar Documents

Publication Publication Date Title
JPS5618434A (en) Semiconductor device
JPS5793584A (en) Semiconductor photoreceiving element
GB855382A (en) Method of producing a p-n junction in a crystalline semiconductor
JPS55108757A (en) Semiconductor device
JPS5429555A (en) Heat sink constituent
JPS5471550A (en) Base metal material for direct heating oxide cathode
JPS5295972A (en) Semiconductor element
JPS6414914A (en) Jig for manufacture of semiconductor
JPS5441673A (en) Semiconductor device and its manufacture
JPS53110465A (en) Semiconductor device
JPS5737860A (en) Enclosure for semiconductor device
JPS5245262A (en) Semiconductor device
JPS5726450A (en) Back surface electrode structure for semiconductor integrated circuit device
JPS53109484A (en) Semiconductor device
JPS5419690A (en) Electrode of semiconductor devices
JPS5615069A (en) Electronic device
JPS5318957A (en) Electrode structure of semiconductor device
JPS57124470A (en) Semiconductor device
JPS5679439A (en) Semiconductor device
JPS5552227A (en) Semiconductor electrode structure
JPS5267983A (en) Semiconductor unit
JPS54126467A (en) Lead frame for semiconductor device
JPS5694785A (en) Solar battery device
JPS5417669A (en) Semiconductor device
JPS5336467A (en) Semiconductor pellet fixture to metal substrate