FR2620569A1 - Process for gauging the thickness of a weld of an electronic component on a substrate - Google Patents

Process for gauging the thickness of a weld of an electronic component on a substrate Download PDF

Info

Publication number
FR2620569A1
FR2620569A1 FR8712604A FR8712604A FR2620569A1 FR 2620569 A1 FR2620569 A1 FR 2620569A1 FR 8712604 A FR8712604 A FR 8712604A FR 8712604 A FR8712604 A FR 8712604A FR 2620569 A1 FR2620569 A1 FR 2620569A1
Authority
FR
France
Prior art keywords
substrate
fusible
electronic component
thickness
balls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR8712604A
Other languages
French (fr)
Inventor
Andre Boucher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR8712604A priority Critical patent/FR2620569A1/en
Publication of FR2620569A1 publication Critical patent/FR2620569A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01061—Promethium [Pm]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0215—Metallic fillers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Process for gauging the thickness e of a weld of an electronic component 10 on a substrate 20, the said weld being made with the aid of a fusible material 30, characterised in that gauged setting means 40, of thickness e, are combined with the said fusible material, and in that the electronic component 10 and the substrate 20 are placed in contact with the said setting means 40. Application to the transfer of components in hybrid technology.

Description

"PROCèDE POUR CALIBRER L'EPAISSEUR D'UNE SOUDURE D'UN COMPO-
SANT ELECTRONIQUE SUR UN SUBSTRAT"."METHOD FOR CALIBRATING THE THICKNESS OF A WELDING OF A COMPO-
ELECTRONIC HEALTH ON A SUBSTRATE ".

La présente invention concerne un procédé pour calibrer l'épaisseur e d'une soudure d'un composant électronique sur un substrat, ladite soudure étant réalisée à l'aide d'un ~matériau fusible. The present invention relates to a method for calibrating the thickness e of a solder of an electronic component on a substrate, said solder being produced using a ~ fusible material.

L'invention trouve une application particulièrement avantageuse dans le domaine de la technologie hybride et, en particulier, dans le report de composants électroniques (ou 'puces') sur un substrat. The invention finds a particularly advantageous application in the field of hybrid technology and, in particular, in the transfer of electronic components (or “chips”) to a substrate.

Un procédé actuellement utilisé pour souder un composant électronique sur un substrat consiste à étaler sur le substrat, à l'endroit prévu pour la soudure, une pàte fusible du type de celles disponibles commercialement, par exemple sous la marque Indalloy. A method currently used for soldering an electronic component on a substrate consists in spreading on the substrate, at the place provided for soldering, a fusible paste of the type of those commercially available, for example under the brand Indalloy.

Ces pâtes fusibles sont composées de particules de métal fusible (Indium, alliage Indium/Etain, etc...} mélangées à un liant et un mouillant tel que la résine de pin. Après avoir étalé ladite pâte fusible, on amène le composant électronique en position sur le substrat et au contact de la pâte fusible. La pâte est ensuite fondue à une température de l'ordre de 170 à 2250 C. Après refroidissement, la soudure est alors réalisée. These fusible pastes are composed of particles of fusible metal (Indium, Indium / Tin alloy, etc.) mixed with a binder and a wetting agent such as pine resin. After spreading said fusible paste, the electronic component is brought in. position on the substrate and in contact with the meltable paste The paste is then melted at a temperature of the order of 170 to 2250 C. After cooling, the welding is then carried out.

L'inconvénient présenté par ce procédé de soudage connu est que l'épaisseur e de la soudure, c'est à dire la distance entre le composant électronique et le substrat, est non uniforme, aléatoire et non reproductible. Or, cette épaisseur e est décisive quant à la détermination de la résistance thermiq.-, de la résistance électrique et de l'encombrement lécaniqu du composant électronique sur le substrat. De plus, l'épaisseur e conditionne la longueur des connexions électriques entre le composant et les contacts situés sur le substrat, or cette longueur est d'une très grande importance dans la valeur des inductances parasites des liaisons composantsubstrat. The disadvantage presented by this known welding method is that the thickness e of the solder, that is to say the distance between the electronic component and the substrate, is non-uniform, random and non-reproducible. However, this thickness e is decisive as regards the determination of the thermal resistance, the electrical resistance and the mechanical bulk of the electronic component on the substrate. In addition, the thickness e conditions the length of the electrical connections between the component and the contacts located on the substrate, but this length is of very great importance in the value of the parasitic inductances of the component-substrate connections.

Aussi, le problème technique à résoudre par l'objet de la présente demande est de proposer un procédé pour calibrer l'épaisseur e d'une soudure d'un composant électronique sur un substrat, ladite soudure étant réalisée à l'aide d'un matériau fusible, procédé grâce auquel on obtiendrait une épaisseur e de soudure constante sur toute sa surface, connue, réglable et reproductible. Also, the technical problem to be solved by the subject of the present application is to propose a method for calibrating the thickness e of a solder of an electronic component on a substrate, said solder being produced using a fusible material, process by which a constant thickness e of weld over its entire surface is obtained, known, adjustable and reproducible.

La solution au problème technique posé consiste, selon la présente invention, en ce que, l'on combine audit matériau fusible des moyens de calage calibrés, d'épaisseur e, et en ce que le composant électronique et le substrat sont mis en contact avec lesdits moyens de calage. The solution to the technical problem posed consists, according to the present invention, in that said fusible material is combined with calibrated wedging means, of thickness e, and in that the electronic component and the substrate are brought into contact with said wedging means.

Dans un premier mode de réalisation du procédé selon l'invention, dans lequel le matériau fusible est une pâte fusible, il est prévu que lesdits moyens de calage sont constitués par des billes calibrées en diamètre, et en ce qu'avant fusion de ladite pâte fusible, on exerce des forces de pression sur le composant électronique et/ou sur le substrat de façon que le composant électronique et le substrat soient en contact avec lesdites billes. L'épaisseur e de la soudure est alors complètement déterminée par le diamètre des billes, qui peuvent être des billes de verre ou, mieux encore, des billes d'un métal alliable ou soudable à la pâte fusible. In a first embodiment of the method according to the invention, in which the meltable material is a meltable paste, provision is made for said wedging means to consist of balls calibrated in diameter, and in that before melting of said paste fuse, pressure forces are exerted on the electronic component and / or on the substrate so that the electronic component and the substrate are in contact with said balls. The thickness e of the weld is then completely determined by the diameter of the balls, which can be glass balls or, better still, balls of an alloyable or weldable metal.

Cette dernière disposition évite le risque de départ des billes non alliées lorsque le composant électronique et le substrat sont lis en contact avec lesdites billes.This latter arrangement avoids the risk of starting unalloyed balls when the electronic component and the substrate are read in contact with said balls.

Enfin, un second mode de réalisation du procédé selon l'invention, dans lequel le matériau fusible est un métal fusible, prévoit que lesdits moyens de image sont constitués par une grille métallique dont les brins sont calibrés en épaisseur, et que ladite grille est recouverte d'une couche dudit métal fusible. Finally, a second embodiment of the method according to the invention, in which the fusible material is a fusible metal, provides that said image means are constituted by a metal grid whose strands are calibrated in thickness, and that said grid is covered a layer of said fusible metal.

La description qui va suivre en regard des dessins annexés, donnés à titre d'exemples non limitatifs, fera bien comprendre en quoi consiste l'invention et comment elle peut être réalisée. The description which follows with reference to the appended drawings, given by way of nonlimiting examples, will make it clear what the invention consists of and how it can be implemented.

Les figures la et 1b illustrent, par des vues en coupe, un premier mode de réalisation du procédé selon l'invention. Figures la and 1b illustrate, in sectional views, a first embodiment of the method according to the invention.

La figure 2 montre à l'aide d'une coupe un deuxième mode de réalisation du procédé selon l'invention. Figure 2 shows with a section a second embodiment of the method according to the invention.

Aux figures la et tb sont représentées des vues en coupe illustrant un procédé pour calibrer l'épaisseur e d'une soudure d'un composant électronique 10 sur un substrat 20, ladite soudure étant réalisée à l'aide d'un matériau fusible 30. Dans le mode de réalisation montré aux figures la et lb, le matériau fusible 30 est constitué par une pâte fusible qui est un mélange de particules de métal fusible et d'un liant. FIGS. 1a and tb show cross-section views illustrating a method for calibrating the thickness e of a solder of an electronic component 10 on a substrate 20, said solder being produced using a fusible material 30. In the embodiment shown in FIGS. 1 a and 1 b, the meltable material 30 is constituted by a meltable paste which is a mixture of particles of meltable metal and a binder.

Ce genre de pâte fusible se trouve aisément dans le commerce, par exemple sous la marque Indalloy. Ainsi que l'indiquent les figures la et lb, on combine audit matériau fusible, ici la pâte fusible, des moyens de calage 40 calibrés d'épaisseur e qui, dans le cas des figures la et lb, sont des billes calibrées en diamètre à 10, 20 ou 30 pm. Comme on peut l'observer à la figure lb, le composant électronique 10 et le substrat 20 sont mis en contact avec les moyens de calage 40, et, plus précisément ici, avant fusion de ladite pâte fusible, on exerce des forces de pression P sur le composant électronique et/ou sur le substrat afin de les mettre en contact avec les billes 40.Ces billes peuvent être des billes de verre, mais, avantageusement, on préférera des billes d'un matériau alliable à la pâte fusible car, dans ce cas, les billes étant incorporées à la pâte fusible de façon positive, aucun départ des billes au moment'de la mise en contact du compos nt électronique et du substrat avec lesdites billes n'est à craindre, alors que cet inconvénient peut se produire avec des billes de verre. Les billes alliables peuvent être, par exemple, des billes de cuivre et la pâte fusible peut être réalisée avec de 1'Indium, un alliage Argent/Etain ou encore un alliage Indium/Etain.This type of meltable paste is readily available commercially, for example under the brand name Indalloy. As indicated in FIGS. 1a and 1b, said fusible material, here the fusible paste, is combined with calibration means 40 calibrated of thickness e which, in the case of FIGS. 1a and 1b, are balls calibrated in diameter at 10, 20 or 30 pm. As can be seen in FIG. 1b, the electronic component 10 and the substrate 20 are brought into contact with the wedging means 40, and, more precisely here, before melting of said fusible paste, pressure forces P are exerted on the electronic component and / or on the substrate in order to bring them into contact with the balls 40. These balls can be glass balls, but, advantageously, we prefer balls of a material that can be combined with fusible paste because, in in this case, the balls being incorporated in the meltable paste in a positive manner, no departure of the balls when the electronic compound and the substrate are brought into contact with said balls is to be feared, while this drawback may occur with glass beads. The alloy balls can be, for example, copper balls and the fusible paste can be produced with Indium, a Silver / Tin alloy or an Indium / Tin alloy.

selon le mode de mise en oeuvre de la figure 2 dans lequel le matériau fusible est un métal fusible, les moyens de calage 40 sont constitués par une grille métallique dont les brins 50 sont calibrés en épaisseur et ladite grille est recouverte d'une couche dudit métal fusible. A titre d'exemple, la grille peut être en cuivre ou en laiton avec des brins 50 de 20 à 30 pm d'épaisseur, comportant en surface une couche 30 d'Indium déposée par voie électrolytique. Les grilles métalliques utilisées sont, soit des grilles métalliques tissées, soit des grilles en métal repoussé. according to the embodiment of Figure 2 in which the fusible material is a fusible metal, the wedging means 40 are constituted by a metal grid whose strands 50 are calibrated in thickness and said grid is covered with a layer of said fusible metal. By way of example, the grid can be made of copper or brass with strands 50 20 to 30 μm thick, comprising on the surface a layer 30 of Indium deposited electrolytically. The metallic grids used are either woven metallic grids or repoussé metal grids.

De même que dans le cas des billes, les grilles métalliques peuvent être associées à une pâte fusible remplissant les mailles desdites grilles.  As in the case of balls, the metal grids can be associated with a fusible paste filling the meshes of said grids.

Claims (6)

REVENDICATIONS :CLAIMS: 1. Procédé pour calibrer l'épaisseur e d'une soudure d'un composant électronique (10) sur un substrat (20), ladite soudure étant réalisée à l'aide d'un matériau fusible (30), caractérisé en ce que l'on combine audit matériau fusible des moyens de calage (40) calibrés, d'épaisseur e, et en ce que le composant électronique (10) et le substrat (20) sont mis en contact avec lesdits moyens de calage (40).1. Method for calibrating the thickness e of a solder of an electronic component (10) on a substrate (20), said solder being produced using a fusible material (30), characterized in that l 'is combined to said fusible material calibrated wedging means (40), of thickness e, and in that the electronic component (10) and the substrate (20) are brought into contact with said wedging means (40). 2. Procédé selon la revendication 1, dans lequel le matériau fusible (30) est une pâte fusible, caractérisé en ce que lesdits moyens de calage (40) sont constitués par des billes calibrées en diamètre, et en ce qu'avant fusion de ladite pâte fusible, on exerce des forces de pression (P) sur le composant électronique (10) et/ou sur le substrat (20) de façon que le composant électronique et le substrat soient en contact avec lesdites billes.2. Method according to claim 1, in which the fusible material (30) is a fusible paste, characterized in that said wedging means (40) consist of balls calibrated in diameter, and in that before melting of said fusible paste, pressure forces (P) are exerted on the electronic component (10) and / or on the substrate (20) so that the electronic component and the substrate are in contact with said balls. 3. Procédé selon la revendication 2, caractérisé en ce que lesdites billes calibrées sont des billes de verre.3. Method according to claim 2, characterized in that said calibrated beads are glass beads. 4. Procédé selon la revendication 2, caractérisé en ce que lesdites billes calibrées sont des billes d'un matériau alliable à ladite pâte fusible.4. Method according to claim 2, characterized in that said calibrated balls are balls of a material alloyable to said meltable paste. 5. Procédé selon la revendication 1, dans lequel le matériau fusible (30) est une pâte fusible, caractérisé en ce que lesdits moyens de calage (40) sont constitués par une grille métallique dont les brins (50) sont calibrés en épaisseur, et en ce qu'avant fusion de ladite pâte fusible, on exerce des forces de pression (P) sur le composant électronique et/ou le substrat (20) de façon que le composant électronique et le substrat soient en contact avec ladite grille. 5. Method according to claim 1, in which the fusible material (30) is a fusible paste, characterized in that said wedging means (40) are constituted by a metal grid whose strands (50) are calibrated in thickness, and in that before melting of said fusible paste, pressure forces (P) are exerted on the electronic component and / or the substrate (20) so that the electronic component and the substrate are in contact with said grid. 6. Procédé selon la revendication 1, dans lequel le matériau fusible (30) est en métal fusible, caractérisé en ce que lesdits moyens de calage (40) sont constitués par une grille métallique dont les brins (50) sont calibrés en épaisseur, et en ce que ladite grille est recouverte d'une couche dudit métal fusible. 6. Method according to claim 1, in which the fusible material (30) is made of fusible metal, characterized in that said wedging means (40) are constituted by a metal grid, the strands (50) of which are calibrated in thickness, and in that said grid is covered with a layer of said fusible metal.
FR8712604A 1987-09-11 1987-09-11 Process for gauging the thickness of a weld of an electronic component on a substrate Withdrawn FR2620569A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8712604A FR2620569A1 (en) 1987-09-11 1987-09-11 Process for gauging the thickness of a weld of an electronic component on a substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8712604A FR2620569A1 (en) 1987-09-11 1987-09-11 Process for gauging the thickness of a weld of an electronic component on a substrate

Publications (1)

Publication Number Publication Date
FR2620569A1 true FR2620569A1 (en) 1989-03-17

Family

ID=9354804

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8712604A Withdrawn FR2620569A1 (en) 1987-09-11 1987-09-11 Process for gauging the thickness of a weld of an electronic component on a substrate

Country Status (1)

Country Link
FR (1) FR2620569A1 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0413335A2 (en) * 1989-08-17 1991-02-20 Canon Kabushiki Kaisha Method of mutually connecting electrode terminals
FR2722916A1 (en) * 1994-02-22 1996-01-26 Nec Corp Connection element comprising solder-coated core
FR2781924A1 (en) * 1998-07-30 2000-02-04 St Microelectronics Sa Procedure for assembly of integrated circuits including a stage of soldering under mechanical pressure with initial spacing of components determined by the diameter of balls of solder
WO2004065050A2 (en) * 2003-01-14 2004-08-05 Molex Incorporated Method and system for solder connecting electrical devices
WO2004107832A1 (en) * 2003-05-22 2004-12-09 Rf Micro Devices, Inc. Solder filler
GB2603488A (en) * 2021-02-04 2022-08-10 Rockwood Composites A soldering compound

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3488840A (en) * 1963-12-27 1970-01-13 Ibm Method of connecting microminiaturized devices to circuit panels
GB1477780A (en) * 1974-08-14 1977-06-29 Seikosha Kk Assembly incorporating electrically conductive adhesive
JPS5618434A (en) * 1979-07-24 1981-02-21 Shindengen Electric Mfg Co Ltd Semiconductor device
JPS5935434A (en) * 1982-08-24 1984-02-27 Nec Corp Semiconductor device
US4529836A (en) * 1983-07-15 1985-07-16 Sperry Corporation Stress absorption matrix
GB2179001A (en) * 1985-08-16 1987-02-25 Burr Brown Corp Method of bonding using paste or non-dry film adhesives

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3488840A (en) * 1963-12-27 1970-01-13 Ibm Method of connecting microminiaturized devices to circuit panels
GB1477780A (en) * 1974-08-14 1977-06-29 Seikosha Kk Assembly incorporating electrically conductive adhesive
JPS5618434A (en) * 1979-07-24 1981-02-21 Shindengen Electric Mfg Co Ltd Semiconductor device
JPS5935434A (en) * 1982-08-24 1984-02-27 Nec Corp Semiconductor device
US4529836A (en) * 1983-07-15 1985-07-16 Sperry Corporation Stress absorption matrix
GB2179001A (en) * 1985-08-16 1987-02-25 Burr Brown Corp Method of bonding using paste or non-dry film adhesives

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, vol. 5, no. 70 (E-56)[742], 12 mai 1981; & JP - A - 56 18434 (SHINDENGEN KOGYO) 21-02-1981 *
PATENT ABSTRACTS OF JAPAN, vol. 8, no. 123 (E-249)[1560], 8 juin 1984; & JP - A - 59 35434 (NIPPON DENKI) 27-02-1984 *

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0413335A2 (en) * 1989-08-17 1991-02-20 Canon Kabushiki Kaisha Method of mutually connecting electrode terminals
EP0413335A3 (en) * 1989-08-17 1991-10-30 Canon Kabushiki Kaisha Method of mutually connecting electrode terminals
US5352318A (en) * 1989-08-17 1994-10-04 Canon Kabushiki Kaisha Method of mutually connecting electrode terminals
FR2722916A1 (en) * 1994-02-22 1996-01-26 Nec Corp Connection element comprising solder-coated core
FR2781924A1 (en) * 1998-07-30 2000-02-04 St Microelectronics Sa Procedure for assembly of integrated circuits including a stage of soldering under mechanical pressure with initial spacing of components determined by the diameter of balls of solder
US7410091B2 (en) 1998-07-30 2008-08-12 Stmicroelectronics S.A. Method of integrated circuit assembly
WO2004065050A2 (en) * 2003-01-14 2004-08-05 Molex Incorporated Method and system for solder connecting electrical devices
WO2004065050A3 (en) * 2003-01-14 2004-09-30 Molex Inc Method and system for solder connecting electrical devices
WO2004107832A1 (en) * 2003-05-22 2004-12-09 Rf Micro Devices, Inc. Solder filler
GB2603488A (en) * 2021-02-04 2022-08-10 Rockwood Composites A soldering compound

Similar Documents

Publication Publication Date Title
EP0709886B1 (en) Anisotropic film conductor for microconnections
FR2591763A1 (en) ELECTRO-OPTICAL TRANSDUCER MODULE AND METHOD FOR MANUFACTURING THE SAME
FR2820551A1 (en) IGNITION CANDLE AND METHOD FOR MANUFACTURING THE SAME
FR2706448A1 (en) A method of making a gas-tight brazed connection and applying the method to the manufacture of components having a vacuum-tight housing.
FR2936966A1 (en) METHOD FOR OBTAINING A SELECTIVE WELDING BARRIER
FR2620569A1 (en) Process for gauging the thickness of a weld of an electronic component on a substrate
FR2541044A1 (en) Method for mounting a printed-circuit board on a substrate
JP2557268B2 (en) Device mounting method
FR2570383A1 (en) Stable thermally conductive composition and semiconductor device unit in which this composition is employed
FR2769100A1 (en) Casing for photosemiconductor device
JP3078489B2 (en) Soldering method and equipment manufactured from the method
FR2706139A1 (en) Material for soldering
EP1427008B1 (en) Process of manufacturing an electronic module comprising an active component on a substrate
FR2722916A1 (en) Connection element comprising solder-coated core
EP0985334B1 (en) Electronic component adapter
FR2818870A1 (en) METHOD FOR REALIZING INTERCONNECTION IN A MULTI-LAYER PRINTED CIRCUIT
Choe et al. Low temperature fluxless bonding technique using In-Sn composite
EP0753990B1 (en) Connection device and process
FR2783106A1 (en) METHOD AND DEVICE FOR ELECTRICALLY CONNECTING CONTACT PINS IN ELECTRICAL CIRCUITS
FR3021670B1 (en) METHOD FOR PERMANENTLY ASSEMBLING TWO ELEMENTS BY TRANSIENT LIQUID PHASE INTERDIFFUSION
WO2016139429A1 (en) Brazing method for assembling two elements via an intermetallic compound, and device comprising two elements assembled by an intermetallic component
FR2781924A1 (en) Procedure for assembly of integrated circuits including a stage of soldering under mechanical pressure with initial spacing of components determined by the diameter of balls of solder
EP0493194B1 (en) Spot welding electrode
CH643089A5 (en) Method of mounting an integrated circuit board on a substrate
EP0711614A1 (en) Method for assembling two metal banks

Legal Events

Date Code Title Description
ST Notification of lapse