JPS56166535A - Data transferring circuit - Google Patents
Data transferring circuitInfo
- Publication number
- JPS56166535A JPS56166535A JP7191880A JP7191880A JPS56166535A JP S56166535 A JPS56166535 A JP S56166535A JP 7191880 A JP7191880 A JP 7191880A JP 7191880 A JP7191880 A JP 7191880A JP S56166535 A JPS56166535 A JP S56166535A
- Authority
- JP
- Japan
- Prior art keywords
- memories
- data
- circuit
- data transfer
- outputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
Abstract
PURPOSE:To increase the data processing efficiency of a processor PC, by making data transfer between memories without passing through the PC, by providing an address generating function in a selection circuit controlling data transfer between memories. CONSTITUTION:In a data transfer circuit 1, a latch signal SPAD out-putted from a PC is fed to a latch circuit 2, and a data outputted from the PC to an internal data bus IDB is latched to the circuit 2. This data is decoded at a decoder 3 to output selection signals SEL1-SELn and to select memories 4-1-4-n. In the memories 4-1-4-n, data transfer is made with a memory 6 via a selection circuit 5 according to the address outputted from the PC to an address bus IAB. The memory 6 is accessed with the access given at an external address bus EAB and makes data transfer among the memories 4-1-4-n via a circuit 5. In case of data tranfer among the memories, a transfer command signal TC is outputted from the PC.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7191880A JPS56166535A (en) | 1980-05-27 | 1980-05-27 | Data transferring circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7191880A JPS56166535A (en) | 1980-05-27 | 1980-05-27 | Data transferring circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56166535A true JPS56166535A (en) | 1981-12-21 |
Family
ID=13474387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7191880A Pending JPS56166535A (en) | 1980-05-27 | 1980-05-27 | Data transferring circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56166535A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5787240A (en) * | 1994-05-20 | 1998-07-28 | Fujitsu Ltd. | Printer control apparatus converting video data from an external host to video data for a printer |
-
1980
- 1980-05-27 JP JP7191880A patent/JPS56166535A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5787240A (en) * | 1994-05-20 | 1998-07-28 | Fujitsu Ltd. | Printer control apparatus converting video data from an external host to video data for a printer |
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