JPS56159759A - Selecting method for input and output equipment of multiple computer system - Google Patents

Selecting method for input and output equipment of multiple computer system

Info

Publication number
JPS56159759A
JPS56159759A JP6375980A JP6375980A JPS56159759A JP S56159759 A JPS56159759 A JP S56159759A JP 6375980 A JP6375980 A JP 6375980A JP 6375980 A JP6375980 A JP 6375980A JP S56159759 A JPS56159759 A JP S56159759A
Authority
JP
Japan
Prior art keywords
input
output equipment
data
queue
address information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6375980A
Other languages
Japanese (ja)
Other versions
JPS5813935B2 (en
Inventor
Kiyoshi Masuda
Kazuhiko Saka
Koji Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP6375980A priority Critical patent/JPS5813935B2/en
Publication of JPS56159759A publication Critical patent/JPS56159759A/en
Publication of JPS5813935B2 publication Critical patent/JPS5813935B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To generate and debug an application program easily by reading data of the 1st and 2nd tables from the 3rd table and by transmitting information for specifying an input and output equipment to another computer by actuating a transmission program when a computer uses the 2nd table. CONSTITUTION:A main routine stored in a storage area 29 operates independently of other programs to supervise a queue normally and, when finding address information in the queue, refers to the 2nd table on the basis of the address information to delete the address information from the queue, thereby obtaining from the 2nd table and transmitting information for specifying an input and output equipment and data requesting the securing of a buffer to the computer 10 of a data processor 2 via controllers 12 and 12. On knowing that the buffer is secured, data in a storage area 27 is sent to the data processor 2 and when a completion code is received from the processor 2, control is returned.
JP6375980A 1980-05-13 1980-05-13 How to select input/output devices in a multiple computer system Expired JPS5813935B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6375980A JPS5813935B2 (en) 1980-05-13 1980-05-13 How to select input/output devices in a multiple computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6375980A JPS5813935B2 (en) 1980-05-13 1980-05-13 How to select input/output devices in a multiple computer system

Publications (2)

Publication Number Publication Date
JPS56159759A true JPS56159759A (en) 1981-12-09
JPS5813935B2 JPS5813935B2 (en) 1983-03-16

Family

ID=13238633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6375980A Expired JPS5813935B2 (en) 1980-05-13 1980-05-13 How to select input/output devices in a multiple computer system

Country Status (1)

Country Link
JP (1) JPS5813935B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58125161A (en) * 1982-01-22 1983-07-26 Hitachi Ltd Multiple computer device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58165492U (en) * 1982-04-26 1983-11-04 三井造船株式会社 Blind lid for heat exchanger tube
JPS60167631U (en) * 1984-03-23 1985-11-07 株式会社神戸製鋼所 Cylindrical body inserter
JPS628038U (en) * 1985-07-02 1987-01-19

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58125161A (en) * 1982-01-22 1983-07-26 Hitachi Ltd Multiple computer device
JPS6327740B2 (en) * 1982-01-22 1988-06-06 Hitachi Seisakusho Kk

Also Published As

Publication number Publication date
JPS5813935B2 (en) 1983-03-16

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