JPS56159723A - Clock switching control system - Google Patents
Clock switching control systemInfo
- Publication number
- JPS56159723A JPS56159723A JP6311080A JP6311080A JPS56159723A JP S56159723 A JPS56159723 A JP S56159723A JP 6311080 A JP6311080 A JP 6311080A JP 6311080 A JP6311080 A JP 6311080A JP S56159723 A JPS56159723 A JP S56159723A
- Authority
- JP
- Japan
- Prior art keywords
- outputs
- clock
- output
- effective
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
Abstract
PURPOSE:To switch clock source without depending upon a difference in period among clock outputs, by invalidating outputs of all synchronizing circuits in switching and by validating inputs of the synchronizing circuits after stopping the clcoks. CONSTITUTION:A selecting circuit 5-1 connected to switching signal terminals 7-1-7-m specifying the clock output of an optional clock generating source outputs an effective signal to one of outputs 8-1-8-n and ineffective outputs to other outputs. The outputs 8-1-8-n of the selecting circuit 5-1 are connected to gate circuits 2-1-2-n, which receive information from the output of a syncrhonizing circuit connecting with a clock output of a clock generating source other than one selected when the output of the gate circuit is effective and, when one of outputs of the synchronizing circuits is effective, invalidate and output the input of the selecting circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6311080A JPS56159723A (en) | 1980-05-12 | 1980-05-12 | Clock switching control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6311080A JPS56159723A (en) | 1980-05-12 | 1980-05-12 | Clock switching control system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56159723A true JPS56159723A (en) | 1981-12-09 |
JPS648369B2 JPS648369B2 (en) | 1989-02-14 |
Family
ID=13219817
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6311080A Granted JPS56159723A (en) | 1980-05-12 | 1980-05-12 | Clock switching control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56159723A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS605499A (en) * | 1983-06-23 | 1985-01-12 | Fujitsu Ltd | Resetting system of register file |
JPS6399931U (en) * | 1986-12-16 | 1988-06-29 |
-
1980
- 1980-05-12 JP JP6311080A patent/JPS56159723A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS605499A (en) * | 1983-06-23 | 1985-01-12 | Fujitsu Ltd | Resetting system of register file |
JPH0474799B2 (en) * | 1983-06-23 | 1992-11-27 | ||
JPS6399931U (en) * | 1986-12-16 | 1988-06-29 |
Also Published As
Publication number | Publication date |
---|---|
JPS648369B2 (en) | 1989-02-14 |
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