JPS554178A - Information control system - Google Patents

Information control system

Info

Publication number
JPS554178A
JPS554178A JP7767878A JP7767878A JPS554178A JP S554178 A JPS554178 A JP S554178A JP 7767878 A JP7767878 A JP 7767878A JP 7767878 A JP7767878 A JP 7767878A JP S554178 A JPS554178 A JP S554178A
Authority
JP
Japan
Prior art keywords
information
output
register
gate
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7767878A
Other languages
Japanese (ja)
Inventor
Nobuyasu Sumiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP7767878A priority Critical patent/JPS554178A/en
Publication of JPS554178A publication Critical patent/JPS554178A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system

Abstract

PURPOSE:To output high-reliability data by detecting the coincidence of received data with a noise n times continuously without outputting the data immediately, by outputting the data to an output register only when information coindides n times continuously, and by making the contents of the register remain unchanged in case of dissidence. CONSTITUTION:The unit which outputs data information inputted in series is provided with shift register 1 stored temporarily with input information, AND gate 3 and EX-OR gate 4 which output the stored input data information n times continuously according to clocks and detect the conicidence of the information outputted n times, and the logic circuit composed of OR gate 5 and AND gate 6. Further, output register 2 is provided which is stored with input data information on the basis of the output of the logic circuit, and only when input data information agrees n times continuously, the information is outputted with the contents of register 2 modified.
JP7767878A 1978-06-26 1978-06-26 Information control system Pending JPS554178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7767878A JPS554178A (en) 1978-06-26 1978-06-26 Information control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7767878A JPS554178A (en) 1978-06-26 1978-06-26 Information control system

Publications (1)

Publication Number Publication Date
JPS554178A true JPS554178A (en) 1980-01-12

Family

ID=13640539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7767878A Pending JPS554178A (en) 1978-06-26 1978-06-26 Information control system

Country Status (1)

Country Link
JP (1) JPS554178A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58116825A (en) * 1981-12-29 1983-07-12 Fujitsu Ltd Information successive collation system
JPS5986346A (en) * 1982-11-09 1984-05-18 Victor Co Of Japan Ltd Data fetching system
JPS59101942A (en) * 1982-12-01 1984-06-12 Omron Tateisi Electronics Co Data transmitting system
JPS59117879A (en) * 1982-12-24 1984-07-07 Sony Corp Digital data receiver
JPS6459551A (en) * 1987-08-31 1989-03-07 Nec Corp Input circuit
JPH08251145A (en) * 1995-03-15 1996-09-27 Nec Commun Syst Ltd System of checking transfer data between processors

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58116825A (en) * 1981-12-29 1983-07-12 Fujitsu Ltd Information successive collation system
JPS5986346A (en) * 1982-11-09 1984-05-18 Victor Co Of Japan Ltd Data fetching system
JPS59101942A (en) * 1982-12-01 1984-06-12 Omron Tateisi Electronics Co Data transmitting system
JPH0436492B2 (en) * 1982-12-01 1992-06-16 Omron Tateisi Electronics Co
JPS59117879A (en) * 1982-12-24 1984-07-07 Sony Corp Digital data receiver
JPS6459551A (en) * 1987-08-31 1989-03-07 Nec Corp Input circuit
JPH08251145A (en) * 1995-03-15 1996-09-27 Nec Commun Syst Ltd System of checking transfer data between processors

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