JPS6459551A - Input circuit - Google Patents

Input circuit

Info

Publication number
JPS6459551A
JPS6459551A JP62218216A JP21821687A JPS6459551A JP S6459551 A JPS6459551 A JP S6459551A JP 62218216 A JP62218216 A JP 62218216A JP 21821687 A JP21821687 A JP 21821687A JP S6459551 A JPS6459551 A JP S6459551A
Authority
JP
Japan
Prior art keywords
input signal
impressed
input
latch
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62218216A
Other languages
Japanese (ja)
Inventor
Takatoshi Koga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62218216A priority Critical patent/JPS6459551A/en
Publication of JPS6459551A publication Critical patent/JPS6459551A/en
Pending legal-status Critical Current

Links

Landscapes

  • Input From Keyboards Or The Like (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To surely fetch an input signal, by fetching the input signal impressed on an input terminal at a prescribed time interval for two times, and reading a compared result. CONSTITUTION:Binary counters BC1-BCn count a reference clock CLK, and output it as shown in figure. Latch clocks phiA and phiB are outputted at the leading edge and the trailing edge of the binary counter BCn, respectively, and used for the input of the input signal impressed on the input terminal 11 to latch circuits 12 are 13. Since the latch circuits 12 and 13 are compared by a NOR circuit 16 and a readout control signal 14 is impressed only when they coincide with each other and the output of the latch circuit 12 is outputted to a bus 19, it is possible to surely fetch the input signal.
JP62218216A 1987-08-31 1987-08-31 Input circuit Pending JPS6459551A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62218216A JPS6459551A (en) 1987-08-31 1987-08-31 Input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62218216A JPS6459551A (en) 1987-08-31 1987-08-31 Input circuit

Publications (1)

Publication Number Publication Date
JPS6459551A true JPS6459551A (en) 1989-03-07

Family

ID=16716434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62218216A Pending JPS6459551A (en) 1987-08-31 1987-08-31 Input circuit

Country Status (1)

Country Link
JP (1) JPS6459551A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6986070B2 (en) 2000-12-28 2006-01-10 Denso Corporation Microcomputer that cooperates with an external apparatus to be driven by a drive signal

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53122340A (en) * 1977-04-01 1978-10-25 Hitachi Ltd Check system for read-in data
JPS554178A (en) * 1978-06-26 1980-01-12 Sharp Corp Information control system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53122340A (en) * 1977-04-01 1978-10-25 Hitachi Ltd Check system for read-in data
JPS554178A (en) * 1978-06-26 1980-01-12 Sharp Corp Information control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6986070B2 (en) 2000-12-28 2006-01-10 Denso Corporation Microcomputer that cooperates with an external apparatus to be driven by a drive signal

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