JPS56157051A - Manufacture of semiconductor device of lamination type - Google Patents

Manufacture of semiconductor device of lamination type

Info

Publication number
JPS56157051A
JPS56157051A JP6114680A JP6114680A JPS56157051A JP S56157051 A JPS56157051 A JP S56157051A JP 6114680 A JP6114680 A JP 6114680A JP 6114680 A JP6114680 A JP 6114680A JP S56157051 A JPS56157051 A JP S56157051A
Authority
JP
Japan
Prior art keywords
laminated body
braze
plates
brazing
brazed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6114680A
Other languages
Japanese (ja)
Inventor
Tadao Hayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP6114680A priority Critical patent/JPS56157051A/en
Publication of JPS56157051A publication Critical patent/JPS56157051A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/074—Stacked arrangements of non-apertured devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To enable the brazing without a bend of a laminated body by a method wherein melting points of a material used for for brazing for forming the laminated body of semiconductor plates and that for bonding a connecting conductor are different. CONSTITUTION:The semiconductor plates 1 having P-N junctions are laminated with braze plates 12 interposed and brazing is performed by raising the temperature. Then, the brazed laminated silicon plates are cut into small cubes to obtain a columnar laminated body 6. A braze plate 15 made of braze with a melting point lower than a solder layer 2 formed of the solder plates 12 is mounted on the end surface of the columnar laminated body 6. Subsequently, an end surface 7 at the head 4 of a lead wire 3 is put on top the braze plate 15 with the low melting point and brazed by raising the temperature as high as only the braze plate 15 with the low melting point is melted. At this time, the solder of the brazed layer 2 is not melted and the brazing can be conducted without bending the laminated body 6.
JP6114680A 1980-05-08 1980-05-08 Manufacture of semiconductor device of lamination type Pending JPS56157051A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6114680A JPS56157051A (en) 1980-05-08 1980-05-08 Manufacture of semiconductor device of lamination type

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6114680A JPS56157051A (en) 1980-05-08 1980-05-08 Manufacture of semiconductor device of lamination type

Publications (1)

Publication Number Publication Date
JPS56157051A true JPS56157051A (en) 1981-12-04

Family

ID=13162668

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6114680A Pending JPS56157051A (en) 1980-05-08 1980-05-08 Manufacture of semiconductor device of lamination type

Country Status (1)

Country Link
JP (1) JPS56157051A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5956753A (en) * 1982-09-24 1984-04-02 Sanyo Electric Co Ltd Manufacture of laminated semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5133976A (en) * 1974-09-18 1976-03-23 Origin Electric HANDOTA ISOCHI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5133976A (en) * 1974-09-18 1976-03-23 Origin Electric HANDOTA ISOCHI

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5956753A (en) * 1982-09-24 1984-04-02 Sanyo Electric Co Ltd Manufacture of laminated semiconductor device

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