JPS56153761A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56153761A JPS56153761A JP5677180A JP5677180A JPS56153761A JP S56153761 A JPS56153761 A JP S56153761A JP 5677180 A JP5677180 A JP 5677180A JP 5677180 A JP5677180 A JP 5677180A JP S56153761 A JPS56153761 A JP S56153761A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- film
- implanted
- psg
- high concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 2
- 229910052698 phosphorus Inorganic materials 0.000 abstract 2
- 239000011574 phosphorus Substances 0.000 abstract 2
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To achieve high integration by providing eave-shaped double layered masks on an insulating film on a substrate, implanting ions having different conductive types by the use of each mask, forming a junction capacitance in the substrate, and effectively utilizing the area of an MOS type memory cell. CONSTITUTION:On the P type Si substrate 101 on which a gate oxide film 103 is formed, an Si nitride film 104 and a PSG film 105 are sequentially deposited. Then, the PSG film 105 is over-etched by using a resistmask 106, B is implanted, and a P type high concentration region 108 is formed. Then the resist 106 is removed, phosphorus is implanted with the PSG 105 as mask so that the concentration of the phosphorus is higher than that of B, and N tye high concentration region 110 is provided. The difference in lateral positions of the implanted layers 108 and 110 is caused by the difference in sizes of the masks. But the coincidence of the layers 108 and 110 can be achieved by the control of the side etching amount 107 of the PSG film 105 and the heat treatment after the ion implantation. Thus, the junction capacitance comprising the high concentration impurity layers can be formed on a substrate by performing alignment with one mask pattern and the MOS memory by which junction is made to be the coupling capacitance can be highly integrated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5677180A JPS56153761A (en) | 1980-04-28 | 1980-04-28 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5677180A JPS56153761A (en) | 1980-04-28 | 1980-04-28 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56153761A true JPS56153761A (en) | 1981-11-27 |
JPS6129151B2 JPS6129151B2 (en) | 1986-07-04 |
Family
ID=13036734
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5677180A Granted JPS56153761A (en) | 1980-04-28 | 1980-04-28 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56153761A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59184556A (en) * | 1983-04-04 | 1984-10-19 | Nec Corp | Semiconductor integrated circuit |
JPS62141757A (en) * | 1985-12-16 | 1987-06-25 | Mitsubishi Electric Corp | Manufacture of semiconductor storage device |
-
1980
- 1980-04-28 JP JP5677180A patent/JPS56153761A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59184556A (en) * | 1983-04-04 | 1984-10-19 | Nec Corp | Semiconductor integrated circuit |
JPS62141757A (en) * | 1985-12-16 | 1987-06-25 | Mitsubishi Electric Corp | Manufacture of semiconductor storage device |
Also Published As
Publication number | Publication date |
---|---|
JPS6129151B2 (en) | 1986-07-04 |
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