JPS56153437A - Storage device of received data for coupling of electronic computer - Google Patents

Abstract

PURPOSE:To read out data on high speed through relative address assignment of a processor without hampering the bus use right of the processor and enhance the processing efficiency of the processor by storing the received data into the memory without using any common bus. CONSTITUTION:The rise of the strobe signal from a terminal device is detected with a rise detecting circuit 12 of the strobe signal. From a control circuit 13, the latch request signal LT is supplied to a received data register 11, and the channel number CH and input data DT are latched in the register 11. The channel number CN from this register 11 is applied to the circuit 13 and the 1st address conversion circuit 14, and the write address of an RAM17 is determined with a selector 16 by changing over the selector 16 to the reception side by the output of a circulating counter 15 so that the data OD from the register 11 are written in the prescribed area of the RAM17. The selector 16 is controlled time serially by a counter 16 to write the data into the RAM17, and the relative addresses from the processor are determined by the 2nd address conversion circuit 18, at which the data from the RAM17 are read.