JPS63136475U - - Google Patents

Info

Publication number
JPS63136475U
JPS63136475U JP2697287U JP2697287U JPS63136475U JP S63136475 U JPS63136475 U JP S63136475U JP 2697287 U JP2697287 U JP 2697287U JP 2697287 U JP2697287 U JP 2697287U JP S63136475 U JPS63136475 U JP S63136475U
Authority
JP
Japan
Prior art keywords
luminance signal
signal
delayed pulse
horizontal synchronizing
synchronizing signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2697287U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2697287U priority Critical patent/JPS63136475U/ja
Publication of JPS63136475U publication Critical patent/JPS63136475U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図、第６図は本考案実施例の回路図、第２
図はその波形図、第３図、第４図は夫々プリエン
フアシス、デイエンフアシス回路の回路図、第５
図は従来例の波形図である。 ２２……遅延回路、Ｑ２……トランジスタ。 Figures 1 and 6 are circuit diagrams of the embodiment of the present invention;
The figure is a waveform diagram, Figures 3 and 4 are circuit diagrams of the pre-emphasis and de-emphasis circuits, respectively, and Figure 5 is a circuit diagram of the pre-emphasis and de-emphasis circuits.
The figure is a waveform diagram of a conventional example. 22...delay circuit, Q2 ...transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 再生輝度信号から分離した水平同期信号を遅延
して遅延パルスを作成する手段と、この遅延パル
スに基づき再生輝度信号の水平同期信号の立上が
り付近におけるデイエンフアシス量を他の期間よ
りも多く設定するか又は、前記水平同期信号のバ
ツクポーチ部分の一部を所定の直流レベルに置き
変える手段とよりなる輝度信号処理装置。 means for creating a delayed pulse by delaying a horizontal synchronizing signal separated from a reproduced luminance signal, and setting a de-emphasis amount near the rising edge of the horizontal synchronizing signal of the reproduced luminance signal to be larger than other periods based on the delayed pulse, or , a luminance signal processing device comprising means for replacing a part of the back porch portion of the horizontal synchronization signal with a predetermined DC level.
JP2697287U 1987-02-25 1987-02-25 Pending JPS63136475U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2697287U JPS63136475U (en) 1987-02-25 1987-02-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2697287U JPS63136475U (en) 1987-02-25 1987-02-25

Publications (1)

Publication Number Publication Date
JPS63136475U true JPS63136475U (en) 1988-09-07

Family

ID=30828570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2697287U Pending JPS63136475U (en) 1987-02-25 1987-02-25

Country Status (1)

Country Link
JP (1) JPS63136475U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5526784A (en) * 1978-08-17 1980-02-26 Toshiba Corp Video amplifier
JPS60705B2 (en) * 1980-04-30 1985-01-09 富士電機株式会社 Received data storage device for computer connection

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5526784A (en) * 1978-08-17 1980-02-26 Toshiba Corp Video amplifier
JPS60705B2 (en) * 1980-04-30 1985-01-09 富士電機株式会社 Received data storage device for computer connection

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