JPS56149661A - Interface system - Google Patents

Interface system

Info

Publication number
JPS56149661A
JPS56149661A JP5317480A JP5317480A JPS56149661A JP S56149661 A JPS56149661 A JP S56149661A JP 5317480 A JP5317480 A JP 5317480A JP 5317480 A JP5317480 A JP 5317480A JP S56149661 A JPS56149661 A JP S56149661A
Authority
JP
Japan
Prior art keywords
ram3
cpu2
prevention code
reread
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5317480A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6113624B2 (esLanguage
Inventor
Shizuo Uebou
Masanao Matsushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP5317480A priority Critical patent/JPS56149661A/ja
Publication of JPS56149661A publication Critical patent/JPS56149661A/ja
Publication of JPS6113624B2 publication Critical patent/JPS6113624B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
JP5317480A 1980-04-21 1980-04-21 Interface system Granted JPS56149661A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5317480A JPS56149661A (en) 1980-04-21 1980-04-21 Interface system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5317480A JPS56149661A (en) 1980-04-21 1980-04-21 Interface system

Publications (2)

Publication Number Publication Date
JPS56149661A true JPS56149661A (en) 1981-11-19
JPS6113624B2 JPS6113624B2 (esLanguage) 1986-04-14

Family

ID=12935487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5317480A Granted JPS56149661A (en) 1980-04-21 1980-04-21 Interface system

Country Status (1)

Country Link
JP (1) JPS56149661A (esLanguage)

Also Published As

Publication number Publication date
JPS6113624B2 (esLanguage) 1986-04-14

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