JPS56148838A - Mounting method for ic - Google Patents
Mounting method for icInfo
- Publication number
- JPS56148838A JPS56148838A JP5327780A JP5327780A JPS56148838A JP S56148838 A JPS56148838 A JP S56148838A JP 5327780 A JP5327780 A JP 5327780A JP 5327780 A JP5327780 A JP 5327780A JP S56148838 A JPS56148838 A JP S56148838A
- Authority
- JP
- Japan
- Prior art keywords
- adhering layer
- wafer
- substrate member
- kerfs
- hot melt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Dicing (AREA)
Abstract
PURPOSE:To use a substrate member repeatedly by a method wherein an IC wafer is fastened onto a hot melt type thick adhering layer, kerfs are formed up to the way of the adhering layer and dicing is conducted. CONSTITUTION:The surface of a substrate member 1 is honed, and a rough surface section 7 is formed. The section 7 is coated with a polyester group hot melt type adhering layer 8, and an IC wafer 3 is stacked, heated and glued. Kerfs 4 reaching up to the way of the adhering layer 8 are processed penetrating the wafer 3. Heat and pressure are applied to a finger lead of a tape carrier and an IC electrode, and each IC chip 5 is removed gradually from the adhering layer 8. The substrate member 1 can be reused by exfoliating the adhering layer 8 by means of a physical method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5327780A JPS56148838A (en) | 1980-04-22 | 1980-04-22 | Mounting method for ic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5327780A JPS56148838A (en) | 1980-04-22 | 1980-04-22 | Mounting method for ic |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56148838A true JPS56148838A (en) | 1981-11-18 |
Family
ID=12938237
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5327780A Pending JPS56148838A (en) | 1980-04-22 | 1980-04-22 | Mounting method for ic |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56148838A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0614102A2 (en) * | 1993-03-03 | 1994-09-07 | Texas Instruments Incorporated | Improvements in or relating to integrated circuit fabrication |
JP2007509501A (en) * | 2003-10-22 | 2007-04-12 | ノースロップ・グラマン・コーポレーション | Sewing process of hard substrate wafer |
-
1980
- 1980-04-22 JP JP5327780A patent/JPS56148838A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0614102A2 (en) * | 1993-03-03 | 1994-09-07 | Texas Instruments Incorporated | Improvements in or relating to integrated circuit fabrication |
EP0614102A3 (en) * | 1993-03-03 | 1994-11-30 | Texas Instruments Inc | Improvements in or relating to integrated circuit fabrication. |
US5622900A (en) * | 1993-03-03 | 1997-04-22 | Texas Instruments Incorporated | Wafer-like processing after sawing DMDs |
JP2007509501A (en) * | 2003-10-22 | 2007-04-12 | ノースロップ・グラマン・コーポレーション | Sewing process of hard substrate wafer |
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