JPS5614745A - Error control coding-decoding circuit of series-input and series-output type - Google Patents

Error control coding-decoding circuit of series-input and series-output type

Info

Publication number
JPS5614745A
JPS5614745A JP9074679A JP9074679A JPS5614745A JP S5614745 A JPS5614745 A JP S5614745A JP 9074679 A JP9074679 A JP 9074679A JP 9074679 A JP9074679 A JP 9074679A JP S5614745 A JPS5614745 A JP S5614745A
Authority
JP
Japan
Prior art keywords
series
input
output
bits
decoding circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9074679A
Other languages
Japanese (ja)
Other versions
JPS6221415B2 (en
Inventor
Okitsugu Miyamoto
Masayuki Higuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9074679A priority Critical patent/JPS5614745A/en
Publication of JPS5614745A publication Critical patent/JPS5614745A/en
Publication of JPS6221415B2 publication Critical patent/JPS6221415B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end

Abstract

PURPOSE:To improve the transmission efficiency and reliability of information codes by providing a coding circuit that adds a check bit to information bits of a series input and then outputs series bits after bit rate conversion and a decoding circuit that performs the reverse operation. CONSTITUTION:An input code pulse train is input to series-input parallel-output output shift register 6, which is makes a shift with clock pulses 2 synchronizing with the input code pulse train. Up-down counter 8 is made to count up and the output of register 6 is input to multiplexer 7 controlled by circuit 8; and the output of the multiplexer is sampled by clock pulses 19 synchronizing with output code pulses and led out of FF16 and counter 8 is made to count down. Consequently, a check bit for error correction is added easily to information bits of the series input and after coding with series bits, the output can be sent out; and decoding can also be carried out through the reverse operation, so that the transmission efficiency and reliability of information codes can greatly be improved.
JP9074679A 1979-07-17 1979-07-17 Error control coding-decoding circuit of series-input and series-output type Granted JPS5614745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9074679A JPS5614745A (en) 1979-07-17 1979-07-17 Error control coding-decoding circuit of series-input and series-output type

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9074679A JPS5614745A (en) 1979-07-17 1979-07-17 Error control coding-decoding circuit of series-input and series-output type

Publications (2)

Publication Number Publication Date
JPS5614745A true JPS5614745A (en) 1981-02-13
JPS6221415B2 JPS6221415B2 (en) 1987-05-12

Family

ID=14007148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9074679A Granted JPS5614745A (en) 1979-07-17 1979-07-17 Error control coding-decoding circuit of series-input and series-output type

Country Status (1)

Country Link
JP (1) JPS5614745A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH061712U (en) * 1992-06-15 1994-01-14 三菱自動車工業株式会社 Oil drain plug opening and closing structure for engine

Also Published As

Publication number Publication date
JPS6221415B2 (en) 1987-05-12

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