JPS5535562A - Forming method of digital transmission signal - Google Patents

Forming method of digital transmission signal

Info

Publication number
JPS5535562A
JPS5535562A JP10924678A JP10924678A JPS5535562A JP S5535562 A JPS5535562 A JP S5535562A JP 10924678 A JP10924678 A JP 10924678A JP 10924678 A JP10924678 A JP 10924678A JP S5535562 A JPS5535562 A JP S5535562A
Authority
JP
Japan
Prior art keywords
codes
code
circuit
data
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10924678A
Other languages
Japanese (ja)
Inventor
Ryoichi Wada
Mitsuharu Tsuchiya
Takanori Senoo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10924678A priority Critical patent/JPS5535562A/en
Publication of JPS5535562A publication Critical patent/JPS5535562A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Abstract

PURPOSE:To ensure the production and decoding for the signals with a simple means as well as to give correction to the optional 2-word error by adding the 3rd check code to the data plus the 1st and 2nd check codes to detect the reception of the error for transmission. CONSTITUTION:Data A, B and C supplied to input lines 106, 107 and 108 are supplied to P code genreration circuit 101 and Q code generation circit 102, and thus P and Q codes are produced to be delivered to output lines 109 and 110 each. Parallel-serial conversion circuit 103 gives a time-division multiplication to the data puls the P and Q codes to convert them into the serial type signals which are then delivered to 3rd check code additional circuit 104. Circuit 104 adds the 3rd code to the data plus the P and Q codes each and then dlivers them to output line 105. In this way, the signals can be produced and decoded with a simple means, ensuring correction for the optional 2-word error.
JP10924678A 1978-09-05 1978-09-05 Forming method of digital transmission signal Pending JPS5535562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10924678A JPS5535562A (en) 1978-09-05 1978-09-05 Forming method of digital transmission signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10924678A JPS5535562A (en) 1978-09-05 1978-09-05 Forming method of digital transmission signal

Publications (1)

Publication Number Publication Date
JPS5535562A true JPS5535562A (en) 1980-03-12

Family

ID=14505309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10924678A Pending JPS5535562A (en) 1978-09-05 1978-09-05 Forming method of digital transmission signal

Country Status (1)

Country Link
JP (1) JPS5535562A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57171860A (en) * 1981-04-16 1982-10-22 Sony Corp Method for encoding error correction
JPS61285827A (en) * 1985-06-12 1986-12-16 Hitachi Ltd Error controller
US5392299A (en) * 1992-01-15 1995-02-21 E-Systems, Inc. Triple orthogonally interleaed error correction system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57171860A (en) * 1981-04-16 1982-10-22 Sony Corp Method for encoding error correction
JPH0147943B2 (en) * 1981-04-16 1989-10-17 Sony Corp
JPS61285827A (en) * 1985-06-12 1986-12-16 Hitachi Ltd Error controller
US5392299A (en) * 1992-01-15 1995-02-21 E-Systems, Inc. Triple orthogonally interleaed error correction system

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