JPS61285827A - Error controller - Google Patents

Abstract

PURPOSE:To improve the recording efficiency of a data by combining plural data series or groups so as to decrease number of error correction words. CONSTITUTION:A code word is formed by combining plural data with different arising time to each data and a check word P is formed at each code word. That is, as an error correction word Pi at a time (i), D0i-4,D1i-3,D2i-2 and D3i-1 are used as data words in addition to D0i-D3i and they are produced to a data matching two series. The error correction code is used for purpose such as single error correction, double error correction or multiple error correction. The correction processing is also executed to a data matching the 2 series of data. Thus, the very strong error control system is realized together with the interleave effect at the combined operation.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an error control method suitable for performing simple and highly efficient processing for correcting errors in recorded data, and is particularly applicable to digital information. The present invention relates to an error control method suitable for use in an apparatus for recording and reproducing information on optical, magnetic, etc. recording media.

[Background of the invention]

When reproducing digital data recorded on a magnetic or optical recording medium, an error correction code is added to the recorded data and error correction processing is applied to the read data in order to correct data errors caused by omissions in one medium, etc. This is commonly done. For example, an example thereof is disclosed in Japanese Patent Application Laid-Open No. 10560/1983.

In the conventional system described above, by devising the structure of the error correction code and the interleaving method, a practical error control device that can sufficiently deal with errors that may actually occur has been obtained. However, in this conventional example, there is a problem in that the error correction code occupies a large proportion of the true data, resulting in a decrease in recording efficiency. This problem will be explained with reference to FIG. Figure 1 shows four parallel data D
ayD, , D, , D□ are times i-1, i, i+1 .・・・
Error correction code word P when it occurs continuously as in .

Now, to explain how to make Q, for time i, error correction code word Pi is data word, i, Dii.

It is made from D,i,D,i. On the other hand, the error correction code word Q
i + 1 is Pi and data with different times, i-
4, D,i-, ,D,i-, ,D3i-4. That is, a plurality of error correction words are used based on the principle that a strong error correction ability can be obtained by combining with an interleave operation. In the example of Figure 1, P.

Q: There are two. Note that P, Q, etc. are not the same as a data word depending on how the error correction code is created, and may be two words, for example.
The error correction code word occupies a large proportion of the error correction code word (Ds), and the data recording efficiency decreases.This requires multiple error correction words in combination with the interleaving operation to generate the error correction word, as described above. It depends.

[Purpose of the invention]

An object of the present invention is to provide an error control method that can reduce the number of error correction code words and therefore improve data recording efficiency.

[Summary of the invention]

The present invention eliminates the need for multiple error correction words in the conventional method (
For example, in the example shown in Figure 1, there are two redundancy words (for this reason, the method shown in Figure 1 is called a two-redundancy method), whereas in the example shown in Figure 1, there are two redundancy words (one redundancy redundancy method). The generation of error correction code words in the present invention, which is a redundancy method), is characterized by combining a plurality of data sequences or groups.

The plurality of sequences or groups described above corresponds to a combination of different interleaved sequences. Figure 2 shows the simplest case, that is, the error correction word Pi at time i, i
,” Besides D, i, i,−, ,D,i−,.

D, i-, , D, i-1 are also treated as data words, and these two sequences are generated for the combined data. The error correction code can be used for single error correction, double error correction, multiple error correction, etc. depending on the purpose. Correction processing is also performed on data that is a combination of the above two series of data. In FIG. 2, a combination of two series is shown as a simple example, but the number of combinations can be further increased to nine. In the error correction system of the present invention, which is combined from zero-fold series, FIG. 3 shows a general form in which m series of N parallel data are combined.
Even if the error correction code itself is capable of single-error correction, it is proven that it has the ability to correct m-fold errors within the range of data including the above-mentioned m sequences. Therefore, combined with the interleaving effect in combinatorial operations, an extremely powerful error control scheme can be realized.

Here, the error correction process in the present invention will be explained with reference to FIG. In Figure 4, the number of parallel data N is two (D,, Dt
) and the number m of combination sequences is 2.

The correction code word P is generated using NXm=2X2=4 words as data. A case where a single error correction code is used for P will be explained. Pi is DIli, Dii is i +3
, Dli-1 is generated as data. Since P has a single error correction capability, if there are two or more errors in the data and P, it cannot be corrected.

However, even a double error may be correctable from other series to which the error data belongs. The cases where correction cannot be made even with such processing are limited to the cases where there are three or more errors as shown in FIGS. Sunaochi.

With the above method, it is possible to correct double errors while using a single error correction code. Figure 5 shows the method of combining three series when m = 3 (a), the uncorrectable slam (b),
(c) was shown. By turning these into a film, m
It is understood that by combining the sequences, it is possible to correct m-fold errors even with a single error correction code. The above ability can be obtained by repeating the correction operation many times, such as suspending processing when correction is impossible, processing the next series, and then performing correction processing again.

[Embodiments of the invention]

The present invention will be explained in detail below with reference to Examples. FIG. 6 shows a block diagram of essential parts in the first embodiment of the present invention.
The device of this embodiment has the function of recording data 1 on a recording medium 2 together with an error correction code, etc., and after reading the recorded data, performs error correction processing and extracts it as output data 3. Taking 4-byte parallel data as an example, DIl-D has one delay unit, 12, 13
, 14, a set of predetermined sequences as described in the above principle is created, and the data of the sequence that does not delay and the combination 8
The data is input to the encoder 10 as byte data. encoder 1
0 generates a test word P from these data. 2
0 is a circuit including memory elements and the like that determines an appropriate arrangement for a plurality of temporally consecutive groups of information consisting of data 1 and the test word P. The information processed in this way is parallel-to-serial converted by 30, further subjected to appropriate modulation, and recorded on the medium 2. The data read from the medium 2 is demodulated and converted into serial/parallel data by 40, and the array is converted by a circuit 50 which performs the operation opposite to that of 20. 11 to 14 through the exit means 61, 62° 63, 64 for the data word 5 and the test word P.
A data set of the same sequence as the sequence created in is created, error correction processing is executed by the decoder 60, and corrected error-free data 3 is output. On the other hand, if the correction capacity is exceeded due to excessive errors, the uncorrected data is output with an uncorrectable flag 6 attached.

If the uncorrectable flag 6 is set, the above correction process is executed again. By repeating the correction process further,
Errors other than those shown in FIG. 4 or 5, which cannot be corrected in principle, can be corrected one after another. FIG. 7 shows one method of repeated correction processing. In the figure, 65 represents the exit means 61 to 64 in FIG.

The selection of error correction codes in the above embodiments is arbitrary.

For example, codes with single error correction, double error correction or even multiple error correction and error detection capabilities can be used. Therefore, the encoder 10 and decoder 60 are configured according to the code to be used.

As is clear from the above embodiments, the principle of the present invention is to combine a plurality of pieces of data with different times into a code word, and generate a check word P for each code word. It is. Therefore, the test word P
are associated with m pieces of data, respectively. Conversely, all data words are.

It is associated with m test words. Therefore, as long as there are no excessive errors in any of the m sequences, error correction is performed by repeating the error correction process. The property that a certain check word is associated with m data sequences, or that each data is associated with m check words, is similar to a convolutional code. However, whereas the generation of check words in convolutional codes is based on a sum modulo 2, in the present invention, an arbitrary block code is used.
Furthermore, there are essential differences in that decoding is performed repeatedly and the decoding process itself is block code decoding.

〔Effect of the invention〕

As explained above, according to the present invention, multiple error correction is possible while using a low degree of redundancy and a simple code, and its practical effects are remarkable. In other words, the above-mentioned high ability of the present invention is as follows. Each piece of data is associated with test words belonging to multiple series, obtained by repeated combinations, which requires many memory elements; Even in large quantities, it is extremely easy and inexpensive to obtain.

This is not a particular obstacle; on the contrary, the above-mentioned characteristics will only increase its effectiveness.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a method of generating an error correction code using a conventional method, FIG. 2 is a diagram showing an example of error correction code generation according to the present invention, and FIG. 3 is a diagram showing a general generation method of an error correction code according to the present invention. Figures 4 and 5 are diagrams illustrating a specific configuration example of the present invention and its capabilities; Figure 6 is a configuration diagram showing an example of a device for implementing the method of the present invention; Figure 7 FIG. 1 is a diagram showing an example of a device for performing iterative decoding in the present invention. D...Data word, P...Test word, 10...
- Encoder, 60... Decoder, 20... Array conversion circuit, 50... Array inverse conversion circuit, 30... Parallel, serial conversion and modulator, 40... Demodulator and series, parallel converter. 11-14.61-64 and 65...Means for leaving court, 1
...Input data, 2...Recording medium, 3...Output data. 5... Leaked data, 6... Uncorrectable flag.

Claims (1)

[Claims] In an error control method that performs error correction by generating one check word for N pieces of parallel data, each of the above N pieces of parallel data that is generated sequentially with time has m pieces of check word at different times. Extract data to form a set of data, generate one check word for the set of data, convert the arrangement of the data and check word and record it on a medium, and read information from the recording medium. , performs the inverse conversion to the above, extracts the set of data and check words, performs error correction using the data and check words, and uses the output signal as a control signal to repeatedly execute the above error correction processing. An error control method characterized by: