JPS56146249A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS56146249A JPS56146249A JP4898180A JP4898180A JPS56146249A JP S56146249 A JPS56146249 A JP S56146249A JP 4898180 A JP4898180 A JP 4898180A JP 4898180 A JP4898180 A JP 4898180A JP S56146249 A JPS56146249 A JP S56146249A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- silicon
- silicon epitaxial
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4898180A JPS56146249A (en) | 1980-04-14 | 1980-04-14 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4898180A JPS56146249A (en) | 1980-04-14 | 1980-04-14 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56146249A true JPS56146249A (en) | 1981-11-13 |
Family
ID=12818414
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4898180A Pending JPS56146249A (en) | 1980-04-14 | 1980-04-14 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56146249A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0166121A2 (en) * | 1984-06-25 | 1986-01-02 | International Business Machines Corporation | Integrated circuit isolation structure and method of making it |
US5049521A (en) * | 1989-11-30 | 1991-09-17 | Silicon General, Inc. | Method for forming dielectrically isolated semiconductor devices with contact to the wafer substrate |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5330283A (en) * | 1976-09-01 | 1978-03-22 | Hitachi Ltd | Production of substrates for semiconductor integrated circuits |
JPS542300A (en) * | 1977-06-09 | 1979-01-09 | Fujitsu Ltd | Methdo and apparatus for vapor phase growth of magnespinel |
-
1980
- 1980-04-14 JP JP4898180A patent/JPS56146249A/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5330283A (en) * | 1976-09-01 | 1978-03-22 | Hitachi Ltd | Production of substrates for semiconductor integrated circuits |
JPS542300A (en) * | 1977-06-09 | 1979-01-09 | Fujitsu Ltd | Methdo and apparatus for vapor phase growth of magnespinel |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0166121A2 (en) * | 1984-06-25 | 1986-01-02 | International Business Machines Corporation | Integrated circuit isolation structure and method of making it |
US5049521A (en) * | 1989-11-30 | 1991-09-17 | Silicon General, Inc. | Method for forming dielectrically isolated semiconductor devices with contact to the wafer substrate |
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