JPS56143722A - Integrated substrate bias generating circuit - Google Patents

Integrated substrate bias generating circuit

Info

Publication number
JPS56143722A
JPS56143722A JP4667280A JP4667280A JPS56143722A JP S56143722 A JPS56143722 A JP S56143722A JP 4667280 A JP4667280 A JP 4667280A JP 4667280 A JP4667280 A JP 4667280A JP S56143722 A JPS56143722 A JP S56143722A
Authority
JP
Japan
Prior art keywords
substrate
voltage
equation
substrate bias
generating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4667280A
Other languages
Japanese (ja)
Inventor
Masaki Hirata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4667280A priority Critical patent/JPS56143722A/en
Publication of JPS56143722A publication Critical patent/JPS56143722A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To increase a substrate bias voltage in absolute value, by using a clamping MOS diode whose threshold voltage is about 0V. CONSTITUTION:The bias generating circuit consists of oscillating circuit 1, driving circuit 2, coupling capacitor 3, MOS diode 4 substracting a substrate curretn, and clamping MOS diodes 5 and 6. It transistors TR whose amount of a dose is 1.0X 10<11>cm<-2> are used as diodes 5 and 6, threshold voltage VT is 0.1V, point C is calmped at about 0.2V, and the substrate bias voltage is obtained as shown by equation (6) (where VSUB is the bias voltage, VDD the amplitude of the output pulse of circuit 2, and VTS the threshold voltage of the junction diode). Those TRs are connected in series by (n) stages to control the substrate voltage as shown by equation (7) [where (n) is an integer satisfying equation (8)]. Further, VT can be controlled to any value through ion injection.
JP4667280A 1980-04-09 1980-04-09 Integrated substrate bias generating circuit Pending JPS56143722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4667280A JPS56143722A (en) 1980-04-09 1980-04-09 Integrated substrate bias generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4667280A JPS56143722A (en) 1980-04-09 1980-04-09 Integrated substrate bias generating circuit

Publications (1)

Publication Number Publication Date
JPS56143722A true JPS56143722A (en) 1981-11-09

Family

ID=12753847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4667280A Pending JPS56143722A (en) 1980-04-09 1980-04-09 Integrated substrate bias generating circuit

Country Status (1)

Country Link
JP (1) JPS56143722A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02244678A (en) * 1989-03-16 1990-09-28 Rohm Co Ltd Constant voltage diode
JP2017034537A (en) * 2015-08-04 2017-02-09 パナソニックＩｐマネジメント株式会社 Driver and semiconductor relay using the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53102682A (en) * 1977-02-18 1978-09-07 Toshiba Corp Control method of self substrate bias voltage
JPS53121561A (en) * 1977-03-31 1978-10-24 Toshiba Corp Mos integrated circuit device
JPS54109750A (en) * 1978-02-17 1979-08-28 Cho Lsi Gijutsu Kenkyu Kumiai Semiconductor circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53102682A (en) * 1977-02-18 1978-09-07 Toshiba Corp Control method of self substrate bias voltage
JPS53121561A (en) * 1977-03-31 1978-10-24 Toshiba Corp Mos integrated circuit device
JPS54109750A (en) * 1978-02-17 1979-08-28 Cho Lsi Gijutsu Kenkyu Kumiai Semiconductor circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02244678A (en) * 1989-03-16 1990-09-28 Rohm Co Ltd Constant voltage diode
JP2017034537A (en) * 2015-08-04 2017-02-09 パナソニックＩｐマネジメント株式会社 Driver and semiconductor relay using the same

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