JPS5613739A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5613739A
JPS5613739A JP8821479A JP8821479A JPS5613739A JP S5613739 A JPS5613739 A JP S5613739A JP 8821479 A JP8821479 A JP 8821479A JP 8821479 A JP8821479 A JP 8821479A JP S5613739 A JPS5613739 A JP S5613739A
Authority
JP
Japan
Prior art keywords
film
copper plate
thermal
polyimide film
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8821479A
Other languages
Japanese (ja)
Inventor
Yasutoshi Kurihara
Komei Yatsuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8821479A priority Critical patent/JPS5613739A/en
Publication of JPS5613739A publication Critical patent/JPS5613739A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To enable excellent electric insulation, effective thermal dispersion and the prevention of noises due to electromagnetic wave disturbance by a method wherein a semiconductor element is placed on a supporting body through a polyimide film. CONSTITUTION:With a polyimide film, volume resistivity if 10<18>OMEGAcm (25 deg.C), dielectric pressure resistance 280kV/cm (25 deg.C), a coefficient of thermal expansion 20X10<-6>/ deg.C (normal temperature) and density 1.42g/cm<3>, and a thin-film with about 10mum thickness is easily formed. Thus, insulation between a semiconductor element and a supporting body can easily be realized, and thermal fatigue is difficult to be generated at adhering portions because the coefficient of thermal expansion of the film is close to those of Cu and Al. Its thermal conductivity is 4X10<-4> cal/cm sec deg.C, but a radiating property which practically has no trouble can be ensured because the film is formed in the thin-film. Thus, when a Si element 1 is integrally fitted onto the copper plate 4 through the polyimide film 3 on the copper plate 2, dielectric resistance is high and thermal resistance is low, the copper plate 2 can be grounded because the copper plate 2 is insulated from the element 1, and noises can be decreased.
JP8821479A 1979-07-13 1979-07-13 Semiconductor device Pending JPS5613739A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8821479A JPS5613739A (en) 1979-07-13 1979-07-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8821479A JPS5613739A (en) 1979-07-13 1979-07-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5613739A true JPS5613739A (en) 1981-02-10

Family

ID=13936646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8821479A Pending JPS5613739A (en) 1979-07-13 1979-07-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5613739A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0198232A (en) * 1987-10-12 1989-04-17 Matsushita Electron Corp Semiconductor device
US4821409A (en) * 1981-10-26 1989-04-18 Burndy Corporation Electrical connection apparatus for flat conductor cables and similar articles
US4833775A (en) * 1981-10-26 1989-05-30 Burndy Corporation Electrical connection apparatus for flat conductor cables and similar articles
US5194934A (en) * 1988-07-27 1993-03-16 Semiconductor Energy Laboratory Co., Ltd. Mounting structure for a semiconductor chip having a buffer layer
JPWO2017145667A1 (en) * 2016-02-24 2018-03-01 三菱電機株式会社 Semiconductor module and manufacturing method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5382167A (en) * 1976-12-27 1978-07-20 Fuji Electric Co Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5382167A (en) * 1976-12-27 1978-07-20 Fuji Electric Co Ltd Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4821409A (en) * 1981-10-26 1989-04-18 Burndy Corporation Electrical connection apparatus for flat conductor cables and similar articles
US4833775A (en) * 1981-10-26 1989-05-30 Burndy Corporation Electrical connection apparatus for flat conductor cables and similar articles
JPH0198232A (en) * 1987-10-12 1989-04-17 Matsushita Electron Corp Semiconductor device
US5194934A (en) * 1988-07-27 1993-03-16 Semiconductor Energy Laboratory Co., Ltd. Mounting structure for a semiconductor chip having a buffer layer
JPWO2017145667A1 (en) * 2016-02-24 2018-03-01 三菱電機株式会社 Semiconductor module and manufacturing method thereof

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